Don't write to color targets in depth-only mode.

2016-05-24 21:58:02 -05:00
parent ad83a1994d
commit 9d1e66ab16
2 changed files with 7 additions and 11 deletions
--- a/src/xenia/gpu/vulkan/pipeline_cache.h
+++ b/src/xenia/gpu/vulkan/pipeline_cache.h
@@ -216,7 +216,6 @@ class PipelineCache {
    uint32_t pa_sc_screen_scissor_br;
    uint32_t pa_sc_viz_query;
    uint32_t multi_prim_ib_reset_index;
-    uint32_t rb_modecontrol;

    UpdateRasterizationStateRegisters() { Reset(); }
    void Reset() { std::memset(this, 0, sizeof(*this)); }
@@ -246,6 +245,7 @@ class PipelineCache {
    uint32_t rb_colorcontrol;
    uint32_t rb_color_mask;
    uint32_t rb_blendcontrol[4];
+    uint32_t rb_modecontrol;

    UpdateColorBlendStateRegisters() { Reset(); }
    void Reset() { std::memset(this, 0, sizeof(*this)); }