fnabsx

src/xenia/cpu/frontend/test/bin/instr_fnabs.dis

@@ -0,0 +1,9 @@
+
+/vagrant/src/xenia/cpu/frontend/test/bin//instr_fnabs.o:     file format elf64-powerpc
+
+
+Disassembly of section .text:
+
+0000000000100000 <test_fnabs_1>:
+  100000:	fc 40 09 10 	fnabs   f2,f1
+  100004:	4e 80 00 20 	blr

src/xenia/cpu/frontend/test/bin/instr_fnabs.map

@@ -0,0 +1 @@
+0000000000000000 t test_fnabs_1

src/xenia/cpu/frontend/test/instr_fnabs.s

@@ -0,0 +1,5 @@
+test_fnabs_1:
+  #_ REGISTER_IN f1 0x400C000000000000
+  fnabs f2, f1
+  blr
+  #_ REGISTER_OUT f2 0xC00C000000000000

src/xenia/cpu/frontend/test/xe-cpu-ppc-test.vcxproj

@@ -135,6 +135,7 @@
     <None Include="instr_divwu.s" />
     <None Include="instr_eqv.s" />
     <None Include="instr_fabs.s" />
+    <None Include="instr_fnabs.s" />
     <None Include="instr_fsel.s" />
     <None Include="instr_lvexx.s" />
     <None Include="instr_lvl.s" />

src/xenia/cpu/frontend/test/xe-cpu-ppc-test.vcxproj.filters

@@ -93,6 +93,7 @@
     <None Include="instr_vsubuhm.s" />
     <None Include="instr_vupkd3d128.s" />
     <None Include="instr_vupkhsh.s" />
+    <None Include="instr_fnabs.s" />
   </ItemGroup>
   <ItemGroup>
     <Filter Include="src">