From b7add3e0ec49df1bbd2ed65972ad5393ca026587 Mon Sep 17 00:00:00 2001
From: "Herman S." <429230+has207@users.noreply.github.com>
Date: Sun, 19 Oct 2025 14:08:36 +0900
Subject: [PATCH] [CPU/PPC] Add Linux workaround for fdiv instruction format

On Linux, these instructions appear to use A format (FRA, FRB, FRT)
instead of the standard X format (RA, RB, RT). Need to verify if this
is needed on Windows or is Linux specific.
---
 src/xenia/cpu/ppc/ppc_emit_fpu.cc | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/src/xenia/cpu/ppc/ppc_emit_fpu.cc b/src/xenia/cpu/ppc/ppc_emit_fpu.cc
index 286d61b5f..46f62d52a 100644
--- a/src/xenia/cpu/ppc/ppc_emit_fpu.cc
+++ b/src/xenia/cpu/ppc/ppc_emit_fpu.cc
@@ -54,18 +54,35 @@ int InstrEmit_faddsx(PPCHIRBuilder& f, const InstrData& i) {
 
 int InstrEmit_fdivx(PPCHIRBuilder& f, const InstrData& i) {
   // frD <- frA / frB
+#if XE_PLATFORM_LINUX
+  // TODO(has207): verify if this is needed on Windows
+  // On Linux, fdiv needs to use A format fields instead of X format
   Value* v = f.Div(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRB));
   f.StoreFPR(i.A.FRT, v);
   f.UpdateFPSCR(v, i.A.Rc);
+#else
+  Value* v = f.Div(f.LoadFPR(i.X.RA), f.LoadFPR(i.X.RB));
+  f.StoreFPR(i.X.RT, v);
+  f.UpdateFPSCR(v, i.X.Rc);
+#endif
   return 0;
 }
 
 int InstrEmit_fdivsx(PPCHIRBuilder& f, const InstrData& i) {
   // frD <- frA / frB
+#if XE_PLATFORM_LINUX
+  // TODO(has207): verify if this is needed on Windows
+  // On Linux, fdivs needs to use A format fields instead of X format
   Value* v = f.Div(f.LoadFPR(i.A.FRA), f.LoadFPR(i.A.FRB));
   v = f.ToSingle(v);
   f.StoreFPR(i.A.FRT, v);
   f.UpdateFPSCR(v, i.A.Rc);
+#else
+  Value* v = f.Div(f.LoadFPR(i.X.RA), f.LoadFPR(i.X.RB));
+  v = f.ToSingle(v);
+  f.StoreFPR(i.X.RT, v);
+  f.UpdateFPSCR(v, i.X.Rc);
+#endif
   return 0;
 }