[GPU] Common resolve code based on compute shaders, swap MSAA samples 1 and 2, change ROV write rounding, random refactoring
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@@ -81,6 +81,7 @@ bool SharedMemory::Initialize() {
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}
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}
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buffer_gpu_address_ = buffer_->GetGPUVirtualAddress();
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buffer_uav_writes_commit_needed_ = false;
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std::memset(heaps_, 0, sizeof(heaps_));
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heap_count_ = 0;
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@@ -427,7 +428,7 @@ bool SharedMemory::RequestRange(uint32_t start, uint32_t length) {
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if (upload_ranges_.size() == 0) {
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return true;
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}
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TransitionBuffer(D3D12_RESOURCE_STATE_COPY_DEST);
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CommitUAVWritesAndTransitionBuffer(D3D12_RESOURCE_STATE_COPY_DEST);
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command_processor_->SubmitBarriers();
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for (auto upload_range : upload_ranges_) {
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uint32_t upload_range_start = upload_range.first;
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@@ -712,9 +713,20 @@ std::pair<uint32_t, uint32_t> SharedMemory::MemoryInvalidationCallback(
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(page_last - page_first + 1) << page_size_log2_);
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}
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void SharedMemory::TransitionBuffer(D3D12_RESOURCE_STATES new_state) {
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void SharedMemory::CommitUAVWritesAndTransitionBuffer(
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D3D12_RESOURCE_STATES new_state) {
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if (buffer_state_ == new_state) {
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if (new_state == D3D12_RESOURCE_STATE_UNORDERED_ACCESS &&
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buffer_uav_writes_commit_needed_) {
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command_processor_->PushUAVBarrier(buffer_);
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buffer_uav_writes_commit_needed_ = false;
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}
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return;
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}
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command_processor_->PushTransitionBarrier(buffer_, buffer_state_, new_state);
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buffer_state_ = new_state;
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// "UAV -> anything" transition commits the writes implicitly.
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buffer_uav_writes_commit_needed_ = false;
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}
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void SharedMemory::WriteRawSRVDescriptor(D3D12_CPU_DESCRIPTOR_HANDLE handle) {
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