Reset cr6 on vector compare, fix NOT_V128.

src/alloy/backend/x64/x64_emitter.cc

@@ -790,6 +790,8 @@ Address X64Emitter::GetXmmConstPtr(XmmConst id) {
       /* XMMZero                */ vec128f(0.0f),
       /* XMMOne                 */ vec128f(1.0f),
       /* XMMNegativeOne         */ vec128f(-1.0f, -1.0f, -1.0f, -1.0f),
+      /* XMMFFFF                */ vec128i(0xFFFFFFFFu, 0xFFFFFFFFu,
+                                           0xFFFFFFFFu, 0xFFFFFFFFu),
       /* XMMMaskX16Y16          */ vec128i(0x0000FFFFu, 0xFFFF0000u,
                                            0x00000000u, 0x00000000u),
       /* XMMFlipX16Y16          */ vec128i(0x00008000u, 0x00000000u,

src/alloy/backend/x64/x64_emitter.h

@@ -42,6 +42,7 @@ enum XmmConst {
   XMMZero = 0,
   XMMOne,
   XMMNegativeOne,
+  XMMFFFF,
   XMMMaskX16Y16,
   XMMFlipX16Y16,
   XMMFixX16Y16,

src/alloy/backend/x64/x64_sequences.cc

@@ -4109,7 +4109,7 @@ EMITTER(NOT_I64, MATCH(I<OPCODE_NOT, I64<>, I64<>>)) {
 EMITTER(NOT_V128, MATCH(I<OPCODE_NOT, V128<>, V128<>>)) {
   static void Emit(X64Emitter& e, const EmitArgType& i) {
     // dest = src ^ 0xFFFF...
-    e.vpxor(i.dest, i.src1, e.GetXmmConstPtr(XMMAbsMaskPD /* FF... */));
+    e.vpxor(i.dest, i.src1, e.GetXmmConstPtr(XMMFFFF /* FF... */));
   }
 };
 EMITTER_OPCODE_TABLE(