Adding a bunch of profiling tracers.

src/alloy/frontend/ppc/ppc_hir_builder.cc

@@ -44,6 +44,8 @@ void PPCHIRBuilder::Reset() {
 }
 
 int PPCHIRBuilder::Emit(FunctionInfo* symbol_info, bool with_debug_info) {
+  SCOPE_profile_cpu_f("alloy");
+
   Memory* memory = frontend_->memory();
   const uint8_t* p = memory->membase();
 

src/alloy/frontend/ppc/ppc_scanner.cc

@@ -38,6 +38,8 @@ bool PPCScanner::IsRestGprLr(uint64_t address) {
 }
 
 int PPCScanner::FindExtents(FunctionInfo* symbol_info) {
+  SCOPE_profile_cpu_f("alloy");
+
   // This is a simple basic block analyizer. It walks the start address to the
   // end address looking for branches. Each span of instructions between
   // branches is considered a basic block. When the last blr (that has no
@@ -286,6 +288,8 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) {
 }
 
 std::vector<BlockInfo> PPCScanner::FindBlocks(FunctionInfo* symbol_info) {
+  SCOPE_profile_cpu_f("alloy");
+
   Memory* memory = frontend_->memory();
   const uint8_t* p = memory->membase();
 

src/alloy/frontend/ppc/ppc_translator.cc

@@ -86,6 +86,8 @@ int PPCTranslator::Translate(
     FunctionInfo* symbol_info,
     uint32_t debug_info_flags,
     Function** out_function) {
+  SCOPE_profile_cpu_f("alloy");
+
   // Scan the function to find its extents. We only need to do this if we
   // haven't already been provided with them from some other source.
   if (!symbol_info->has_end_address()) {