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[GPU] DC_LUT_RW_INDEX/WRITE_EN_MASK + gamma ramp and registers in traces

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This commit is contained in:
Triang3l
2022-05-05 13:10:29 +03:00
parent 2d90d5940f
commit c794d0d538
19 changed files with 743 additions and 242 deletions
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16
src/xenia/gpu/vulkan/vulkan_command_processor.cc
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@@ -191,20 +191,6 @@ void VulkanCommandProcessor::WriteRegister(uint32_t index, uint32_t value) {
offset ^= 0x1F;
dirty_loop_constants_ |= (1 << offset);
} else if (index == XE_GPU_REG_DC_LUT_PWL_DATA) {
UpdateGammaRampValue(GammaRampType::kPWL, value);
} else if (index == XE_GPU_REG_DC_LUT_30_COLOR) {
UpdateGammaRampValue(GammaRampType::kTable, value);
} else if (index >= XE_GPU_REG_DC_LUT_RW_MODE &&
index <= XE_GPU_REG_DC_LUTA_CONTROL) {
uint32_t offset = index - XE_GPU_REG_DC_LUT_RW_MODE;
offset ^= 0x05;
dirty_gamma_constants_ |= (1 << offset);
if (index == XE_GPU_REG_DC_LUT_RW_INDEX) {
gamma_ramp_rw_subindex_ = 0;
}
}
}
@@ -1400,8 +1386,6 @@ bool VulkanCommandProcessor::IssueCopy() {
return true;
}
void VulkanCommandProcessor::InitializeTrace() {}
} // namespace vulkan
} // namespace gpu
} // namespace xe