Huge set of performance improvements, combined with an architecture specific build and clang-cl users have reported absurd gains over master for some gains, in the range 50%-90%

But for normal msvc builds i would put it at around 30-50%
Added per-xexmodule caching of information per instruction, can be used to remember what code needs compiling at start up
Record what guest addresses wrote mmio and backpropagate that to future runs, eliminating dependence on exception trapping. this makes many games like h3 actually tolerable to run under a debugger
fixed a number of errors where temporaries were being passed by reference/pointer
Can now be compiled with clang-cl 14.0.1, requires -Werror off though and some other solution/project changes.
Added macros wrapping compiler extensions like noinline, forceinline, __expect, and cold.
Removed the "global lock" in guest code completely. It does not properly emulate the behavior of mfmsrd/mtmsr and it seriously cripples amd cpus. Removing this yielded around a 3x speedup in Halo Reach for me.
Disabled the microprofiler for now. The microprofiler has a huge performance cost associated with it. Developers can re-enable it in the base/profiling header if they really need it
Disable the trace writer in release builds. despite just returning after checking if the file was open the trace functions were consuming about 0.60% cpu time total
Add IsValidReg, GetRegisterInfo is a huge (about 45k) branching function and using that to check if a register was valid consumed a significant chunk of time
Optimized RingBuffer::ReadAndSwap and RingBuffer::read_count. This gave us the largest overall boost in performance. The memcpies were unnecessary and one of them was always a no-op
Added simplification rules for multiplicative patterns like (x+x), (x<<1)+x
For the most frequently called win32 functions i added code to call their underlying NT implementations, which lets us skip a lot of MS code we don't care about/isnt relevant to our usecases
^this can be toggled off in the platform_win header
handle indirect call true with constant function pointer, was occurring in h3
lookup host format swizzle in denser array
by default, don't check if a gpu register is unknown, instead just check if its out of range. controlled by a cvar
^looking up whether its known or not took approx 0.3% cpu time
Changed some things in /cpu to make the project UNITYBUILD friendly
The timer thread was spinning way too much and consuming a ton of cpu, changed it to use a blocking wait instead
tagged some conditions as XE_UNLIKELY/LIKELY based on profiler feedback (will only affect clang builds)
Shifted around some code in CommandProcessor::WriteRegister based on how frequently it was executed
added support for docdecaduple precision floating point so that we can represent our performance gains numerically
tons of other stuff im probably forgetting

src/xenia/cpu/ppc/ppc_emit_altivec.cc

@@ -1439,11 +1439,23 @@ int InstrEmit_vsel(PPCHIRBuilder& f, const InstrData& i) {
 int InstrEmit_vsel128(PPCHIRBuilder& f, const InstrData& i) {
   return InstrEmit_vsel_(f, VX128_VD128, VX128_VA128, VX128_VB128, VX128_VD128);
 }
+// chrispy: this is test code for checking whether a game takes advantage of the
+// VSR/VSL undocumented/undefined variable shift behavior
+static void AssertShiftElementsOk(PPCHIRBuilder& f, Value* v) {
+#if 0
+  Value* splatted = f.Splat(f.Extract(v, (uint8_t)0, INT8_TYPE), VEC128_TYPE);
 
+  Value* checkequal = f.Xor(splatted, v);
+  f.DebugBreakTrue(f.IsTrue(checkequal));
+#endif
+}
 int InstrEmit_vsl(PPCHIRBuilder& f, const InstrData& i) {
-  Value* v = f.Shl(f.LoadVR(i.VX.VA),
-                   f.And(f.Extract(f.LoadVR(i.VX.VB), 15, INT8_TYPE),
-                         f.LoadConstantInt8(0b111)));
+  Value* va = f.LoadVR(i.VX.VA);
+  Value* vb = f.LoadVR(i.VX.VB);
+
+  AssertShiftElementsOk(f, vb);
+  Value* v =
+      f.Shl(va, f.And(f.Extract(vb, 15, INT8_TYPE), f.LoadConstantInt8(0b111)));
   f.StoreVR(i.VX.VD, v);
   return 0;
 }
@@ -1623,9 +1635,13 @@ int InstrEmit_vspltisw128(PPCHIRBuilder& f, const InstrData& i) {
 }
 
 int InstrEmit_vsr(PPCHIRBuilder& f, const InstrData& i) {
-  Value* v = f.Shr(f.LoadVR(i.VX.VA),
-                   f.And(f.Extract(f.LoadVR(i.VX.VB), 15, INT8_TYPE),
-                         f.LoadConstantInt8(0b111)));
+  Value* va = f.LoadVR(i.VX.VA);
+  Value* vb = f.LoadVR(i.VX.VB);
+
+  AssertShiftElementsOk(f, vb);
+
+  Value* v =
+      f.Shr(va, f.And(f.Extract(vb, 15, INT8_TYPE), f.LoadConstantInt8(0b111)));
   f.StoreVR(i.VX.VD, v);
   return 0;
 }

src/xenia/cpu/ppc/ppc_emit_control.cc

@@ -769,8 +769,14 @@ int InstrEmit_mfmsr(PPCHIRBuilder& f, const InstrData& i) {
   // bit 62 = RI; recoverable interrupt
   // return 8000h if unlocked (interrupts enabled), else 0
   f.MemoryBarrier();
-  f.CallExtern(f.builtins()->check_global_lock);
-  f.StoreGPR(i.X.RT, f.LoadContext(offsetof(PPCContext, scratch), INT64_TYPE));
+  if (cvars::disable_global_lock || true) {
+    f.StoreGPR(i.X.RT, f.LoadConstantUint64(0));
+
+  } else {
+    f.CallExtern(f.builtins()->check_global_lock);
+    f.StoreGPR(i.X.RT,
+               f.LoadContext(offsetof(PPCContext, scratch), INT64_TYPE));
+  }
   return 0;
 }
 
@@ -782,6 +788,7 @@ int InstrEmit_mtmsr(PPCHIRBuilder& f, const InstrData& i) {
     f.StoreContext(
         offsetof(PPCContext, scratch),
         f.ZeroExtend(f.ZeroExtend(f.LoadGPR(i.X.RT), INT64_TYPE), INT64_TYPE));
+#if 0
     if (i.X.RT == 13) {
       // iff storing from r13 we are taking a lock (disable interrupts).
       if (!cvars::disable_global_lock) {
@@ -793,6 +800,7 @@ int InstrEmit_mtmsr(PPCHIRBuilder& f, const InstrData& i) {
         f.CallExtern(f.builtins()->leave_global_lock);
       }
     }
+#endif
     return 0;
   } else {
     // L = 0
@@ -807,6 +815,7 @@ int InstrEmit_mtmsrd(PPCHIRBuilder& f, const InstrData& i) {
     f.MemoryBarrier();
     f.StoreContext(offsetof(PPCContext, scratch),
                    f.ZeroExtend(f.LoadGPR(i.X.RT), INT64_TYPE));
+#if 0
     if (i.X.RT == 13) {
       // iff storing from r13 we are taking a lock (disable interrupts).
       if (!cvars::disable_global_lock) {
@@ -818,6 +827,7 @@ int InstrEmit_mtmsrd(PPCHIRBuilder& f, const InstrData& i) {
         f.CallExtern(f.builtins()->leave_global_lock);
       }
     }
+#endif
     return 0;
   } else {
     // L = 0

src/xenia/cpu/ppc/ppc_opcode_disasm_gen.cc

@@ -5406,6 +5406,7 @@ PPCOpcodeDisasmInfo ppc_opcode_disasm_table[] = {
   INSTRUCTION(0x6c000000, "xoris"       , kD      , kI, kGeneral, "XOR Immediate Shifted"                                                      , (PPCOpcodeField::kRS,PPCOpcodeField::kUIMM), (PPCOpcodeField::kRA), PrintDisasm_xoris),
   INSTRUCTION(0x7c000278, "xorx"        , kX      , kI, kGeneral, "XOR"                                                                        , (PPCOpcodeField::kRS,PPCOpcodeField::kRB), (PPCOpcodeField::kRA,PPCOpcodeField::kCRcond), PrintDisasm_xorx),
 };
+#undef INSTRUCTION
 static_assert(sizeof(ppc_opcode_disasm_table) / sizeof(PPCOpcodeDisasmInfo) == static_cast<int>(PPCOpcode::kInvalid), "PPC table mismatch - rerun ppc-table-gen");
 
 const PPCOpcodeDisasmInfo& GetOpcodeDisasmInfo(PPCOpcode opcode) {

src/xenia/cpu/ppc/ppc_opcode_table_gen.cc

@@ -470,6 +470,7 @@ PPCOpcodeInfo ppc_opcode_table[] = {
   INSTRUCTION(0x6c000000, "xoris"       , kD      , kI, kGeneral),
   INSTRUCTION(0x7c000278, "xorx"        , kX      , kI, kGeneral),
 };
+#undef INSTRUCTION
 static_assert(sizeof(ppc_opcode_table) / sizeof(PPCOpcodeInfo) == static_cast<int>(PPCOpcode::kInvalid), "PPC table mismatch - rerun ppc-table-gen");
 
 const PPCOpcodeInfo& GetOpcodeInfo(PPCOpcode opcode) {