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Fixing CR update for divwu/divdu/mulhwu.

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This commit is contained in:
Ben Vanik
2015-12-30 10:04:57 -08:00
parent 69c7bac8db
commit cbc74c92f4
6 changed files with 88 additions and 5 deletions
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6
src/xenia/cpu/ppc/ppc_emit_alu.cc
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@@ -234,7 +234,7 @@ int InstrEmit_divdux(PPCHIRBuilder& f, const InstrData& i) {
return 1;
}
if (i.XO.Rc) {
f.UpdateCR(0, v, false);
f.UpdateCR(0, v);
}
return 0;
}
@@ -291,7 +291,7 @@ int InstrEmit_divwux(PPCHIRBuilder& f, const InstrData& i) {
return 1;
}
if (i.XO.Rc) {
f.UpdateCR(0, v, false);
f.UpdateCR(0, v);
}
return 0;
}
@@ -357,7 +357,7 @@ int InstrEmit_mulhwux(PPCHIRBuilder& f, const InstrData& i) {
INT64_TYPE);
f.StoreGPR(i.XO.RT, v);
if (i.XO.Rc) {
f.UpdateCR(0, v, false);
f.UpdateCR(0, v);
}
return 0;
}