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PACK to 2101010.

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This commit is contained in:
Ben Vanik
2015-06-07 19:44:07 -07:00
parent 98e14fcb1b
commit cd62d4e461
4 changed files with 100 additions and 4 deletions
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6
src/xenia/cpu/frontend/ppc_emit_altivec.cc
View File

@@ -2027,6 +2027,9 @@ XEEMITTER(vpkd3d128, VX128_4(6, 1552), VX128_4)(PPCHIRBuilder& f,
case 1: // VPACK_NORMSHORT2
v = f.Pack(v, PACK_TYPE_SHORT_2);
break;
case 2: // VPACK_... 2_10_10_10 w_z_y_x
v = f.Pack(v, PACK_TYPE_UINT_2101010);
break;
case 3: // VPACK_... 2 FLOAT16s DXGI_FORMAT_R16G16_FLOAT
v = f.Pack(v, PACK_TYPE_FLOAT16_2);
break;
@@ -2125,6 +2128,9 @@ XEEMITTER(vupkd3d128, VX128_3(6, 2032), VX128_3)(PPCHIRBuilder& f,
case 1: // VPACK_NORMSHORT2
v = f.Unpack(v, PACK_TYPE_SHORT_2);
break;
case 2: // VPACK_... 2_10_10_10 w_z_y_x
v = f.Unpack(v, PACK_TYPE_UINT_2101010);
break;
case 3: // VPACK_... 2 FLOAT16s DXGI_FORMAT_R16G16_FLOAT
v = f.Unpack(v, PACK_TYPE_FLOAT16_2);
break;

30
src/xenia/cpu/frontend/test/instr_vpkd3d128.s
View File

@@ -177,6 +177,33 @@ test_vpkd3d128_short2_2:
#_ REGISTER_OUT v3 [4040FFFE, 403FF333, 42A23EC8, 403DB757]
#_ REGISTER_OUT v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 7FFFF333]
test_vpkd3d128_uint_2101010_0:
#_ REGISTER_IN v3 [B8FF8000, B8FF8000, C04001FF, 4E9A5A5A]
#_ REGISTER_IN v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, CDCDCDCD]
# vpkd3d128 v4, v3, 2, 1, 0
.long 0x18891E10
blr
#_ REGISTER_OUT v3 [B8FF8000, B8FF8000, C04001FF, 4E9A5A5A]
#_ REGISTER_OUT v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, E0180601]
test_vpkd3d128_uint_2101010_1:
#_ REGISTER_IN v3 [42C80000, C2C80000, 40400000, 3F800000]
#_ REGISTER_IN v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, CDCDCDCD]
# vpkd3d128 v4, v3, 2, 1, 0
.long 0x18891E10
blr
#_ REGISTER_OUT v3 [42C80000, C2C80000, 40400000, 3F800000]
#_ REGISTER_OUT v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 000805FF]
test_vpkd3d128_uint_2101010_2:
#_ REGISTER_IN v3 [3F000000, BF000000, 3F800000, 00000000]
#_ REGISTER_IN v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, CDCDCDCD]
# vpkd3d128 v4, v3, 2, 1, 0
.long 0x18891E10
blr
#_ REGISTER_OUT v3 [3F000000, BF000000, 3F800000, 00000000]
#_ REGISTER_OUT v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 20180601]
test_vpkd3d128_float16_2_invalid_0:
#_ REGISTER_IN v3 [3FC00000, BFC00000, 42A23EC8, 403DB757]
#_ REGISTER_IN v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, CDCDCDCD]
@@ -185,7 +212,6 @@ test_vpkd3d128_float16_2_invalid_0:
blr
#_ REGISTER_OUT v3 [3FC00000, BFC00000, 42A23EC8, 403DB757]
#_ REGISTER_OUT v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 3E00BE00]
test_vpkd3d128_float16_2_0:
#_ REGISTER_IN v3 [3F000000, BF000000, 00000000, 00000000]
#_ REGISTER_IN v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, CDCDCDCD]
@@ -195,6 +221,7 @@ test_vpkd3d128_float16_2_0:
#_ REGISTER_OUT v3 [3F000000, BF000000, 00000000, 00000000]
#_ REGISTER_OUT v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 3800B800]
test_vpkd3d128_float16_4_invalid_0:
#_ REGISTER_IN v3 [3FC00000, BFC00000, 3FC00000, BFC00000]
#_ REGISTER_IN v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, CDCDCDCD]
@@ -203,7 +230,6 @@ test_vpkd3d128_float16_4_invalid_0:
blr
#_ REGISTER_OUT v3 [3FC00000, BFC00000, 3FC00000, BFC00000]
#_ REGISTER_OUT v4 [CDCDCDCD, CDCDCDCD, 3E00BE00, 3E00BE00]
test_vpkd3d128_float16_4_0:
#_ REGISTER_IN v3 [3F000000, BF000000, 3F000000, BF000000]
#_ REGISTER_IN v4 [CDCDCDCD, CDCDCDCD, CDCDCDCD, CDCDCDCD]