Implementing the vavg instructions (mostly).

Fixes #155.

src/alloy/hir/hir_builder.cc

@@ -1779,6 +1779,24 @@ Value* HIRBuilder::VectorRotateLeft(Value* value1, Value* value2,
   return i->dest;
 }
 
+Value* HIRBuilder::VectorAverage(Value* value1, Value* value2,
+                                 TypeName part_type,
+                                 uint32_t arithmetic_flags) {
+  ASSERT_VECTOR_TYPE(value1);
+  ASSERT_VECTOR_TYPE(value2);
+
+  // This is shady.
+  uint32_t flags = part_type | (arithmetic_flags << 8);
+  assert_zero(flags >> 16);
+
+  Instr* i = AppendInstr(OPCODE_VECTOR_AVERAGE_info, uint16_t(flags),
+                         AllocValue(value1->type));
+  i->set_src1(value1);
+  i->set_src2(value2);
+  i->src3.value = NULL;
+  return i->dest;
+}
+
 Value* HIRBuilder::ByteSwap(Value* value) {
   if (value->type == INT8_TYPE) {
     return value;

src/alloy/hir/hir_builder.h

@@ -204,6 +204,8 @@ class HIRBuilder {
   Value* VectorSha(Value* value1, Value* value2, TypeName part_type);
   Value* RotateLeft(Value* value1, Value* value2);
   Value* VectorRotateLeft(Value* value1, Value* value2, TypeName part_type);
+  Value* VectorAverage(Value* value1, Value* value2, TypeName part_type,
+                       uint32_t arithmetic_flags);
   Value* ByteSwap(Value* value);
   Value* CountLeadingZeros(Value* value);
   Value* Insert(Value* value, Value* index, Value* part);

src/alloy/hir/opcodes.h

@@ -200,6 +200,7 @@ enum Opcode {
   OPCODE_VECTOR_SHA,
   OPCODE_ROTATE_LEFT,
   OPCODE_VECTOR_ROTATE_LEFT,
+  OPCODE_VECTOR_AVERAGE,
   OPCODE_BYTE_SWAP,
   OPCODE_CNTLZ,
   OPCODE_INSERT,

src/alloy/hir/opcodes.inl

@@ -551,6 +551,12 @@ DEFINE_OPCODE(
     OPCODE_SIG_V_V_V,
     0)
 
+DEFINE_OPCODE(
+    OPCODE_VECTOR_AVERAGE,
+    "vector_average",
+    OPCODE_SIG_V_V_V,
+    0)
+
 DEFINE_OPCODE(
     OPCODE_BYTE_SWAP,
     "byte_swap",