fabi/Xenia-Canary
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

JIT - vctsxs: Properly saturate signed integers

Browse Source
This commit is contained in:
Dr. Chat
2017-03-05 17:43:56 -06:00
parent ea89a5d179
commit d5e7bc8dca
5 changed files with 102 additions and 36 deletions
Download Patch File Download Diff File Expand all files Collapse all files

81
src/xenia/cpu/ppc/testing/instr_vctsxs.s
View File

@@ -1,32 +1,71 @@
# 0 * 2^31
test_vctsxs_1:
#_ REGISTER_IN v3 [3f800000, 3fc00000, 3f8ccccd, 3ff33333]
# 1.0, 1.5, 1.1, 1.9
vctsxs v3, v3, 0
#_ REGISTER_IN v0 [00000000, 00000000, 00000000, 00000000]
vctsxs v3, v0, 31
blr
#_ REGISTER_OUT v0 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
# -0 ^ 2^31
test_vctsxs_2:
#_ REGISTER_IN v0 [80000000, 80000000, 80000000, 80000000]
vctsxs v3, v0, 31
blr
#_ REGISTER_OUT v0 [80000000, 80000000, 80000000, 80000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
# smallest positive subnormal * 2^31
test_vctsxs_3:
#_ REGISTER_IN v0 [00000001, 00000001, 00000001, 00000001]
vctsxs v3, v0, 31
blr
#_ REGISTER_OUT v0 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
# largest subnormal * 2^31
test_vctsxs_4:
#_ REGISTER_IN v0 [007FFFFF, 007FFFFF, 007FFFFF, 007FFFFF]
vctsxs v3, v0, 31
blr
#_ REGISTER_OUT v0 [007FFFFF, 007FFFFF, 007FFFFF, 007FFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
# +1 * 2^0
test_vctsxs_5:
#_ REGISTER_IN v0 [3F800000, 3F800000, 3F800000, 3F800000]
vctsxs v3, v0, 0
blr
#_ REGISTER_OUT v0 [3F800000, 3F800000, 3F800000, 3F800000]
#_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001]
test_vctsxs_2:
#_ REGISTER_IN v3 [3f800000, 3fc00000, 3f8ccccd, 3ff33333]
# 1.0, 1.5, 1.1, 1.9
vctsxs v3, v3, 1
# -1 * 2^0
test_vctsxs_6:
#_ REGISTER_IN v0 [BF800000, BF800000, BF800000, BF800000]
vctsxs v3, v0, 0
blr
#_ REGISTER_OUT v3 [00000002, 00000003, 00000002, 00000003]
#_ REGISTER_OUT v0 [BF800000, BF800000, BF800000, BF800000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vctsxs_3:
#_ REGISTER_IN v3 [3f800000, 3fc00000, 3f8ccccd, 3ff33333]
# 1.0, 1.5, 1.1, 1.9
vctsxs v3, v3, 2
# 2^31 * 2^0
test_vctsxs_7:
#_ REGISTER_IN v0 [4F000000, 4F000000, 4F000000, 4F000000]
vctsxs v3, v0, 0
blr
#_ REGISTER_OUT v3 [00000004, 00000006, 00000004, 00000007]
#_ REGISTER_OUT v0 [4F000000, 4F000000, 4F000000, 4F000000]
#_ REGISTER_OUT v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF]
test_vctsxs_4:
#_ REGISTER_IN v3 [42c83333, 43480000, 449a4000, c49a4000]
vctsxs v3, v3, 0
# +infinity * 2^0
test_vctsxs_8:
#_ REGISTER_IN v0 [7F800000, 7F800000, 7F800000, 7F800000]
vctsxs v3, v0, 0
blr
#_ REGISTER_OUT v3 [00000064, 000000c8, 000004d2, fffffb2e]
#_ REGISTER_OUT v0 [7F800000, 7F800000, 7F800000, 7F800000]
#_ REGISTER_OUT v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF]
test_vctsxs_5:
#_ REGISTER_IN v3 [42c83333, 43480000, 449a4000, c49a4000]
vctsxs v3, v3, 1
# -infinity * 2^0
test_vctsxs_9:
#_ REGISTER_IN v0 [FF800000, FF800000, FF800000, FF800000]
vctsxs v3, v0, 0
blr
#_ REGISTER_OUT v3 [000000c8, 00000190, 000009a4, fffff65c]
#_ REGISTER_OUT v0 [FF800000, FF800000, FF800000, FF800000]
#_ REGISTER_OUT v3 [80000000, 80000000, 80000000, 80000000]