[a64] Implement FEAT_LSE optimizations

Adds `platform_arm64` similar to `platform_arm64` to populate a 64-bit feature-flag value and creates a `a64_extension_mask` configuration-mask for the detection and utilization of certain arm ISA features. The first feature being `FEAT_LSE` which maps to `XBYAK_AARCH64_HWCAP_ATOMIC`.

Just like the x64 backend, implements `IsFeatureEnabled` to the emitter for checking if the host processor supports a certain subset of feature flag(s) at once.

Optimizes `OPCODE_ATOMIC_EXCHANGE`, `OPCODE_ATOMIC_COMPARE_EXCHANGE`,
and `OPCODE_RESERVED_STORE` with `FEAT_LSE` instructions.

src/xenia/cpu/backend/a64/a64_emitter.h

@@ -36,7 +36,7 @@ namespace xe {
 namespace cpu {
 namespace backend {
 namespace a64 {
-
+using namespace arm64;
 class A64Backend;
 class A64CodeCache;
 
@@ -140,6 +140,9 @@ class A64Emitter : public Xbyak_aarch64::CodeGenerator {
 
   void ForgetFpcrMode() { fpcr_mode_ = FPCRMode::Unknown; }
   bool ChangeFpcrMode(FPCRMode new_mode, bool already_set = false);
+  bool IsFeatureEnabled(uint64_t feature_flag) const {
+    return (feature_flags_ & feature_flag) == feature_flag;
+  }
 
   Xbyak_aarch64::Label& AddToTail(TailEmitCallback callback,
                                   uint32_t alignment = 0);
@@ -161,6 +164,7 @@ class A64Emitter : public Xbyak_aarch64::CodeGenerator {
   A64CodeCache* code_cache_ = nullptr;
   XbyakA64Allocator* allocator_ = nullptr;
   XexModule* guest_module_ = nullptr;
+  uint64_t feature_flags_ = 0;
   uint32_t current_guest_function_ = 0;
 
   Xbyak_aarch64::Label* epilog_label_ = nullptr;