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Fixing constant compare.

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This commit is contained in:
Ben Vanik
2015-05-14 14:42:54 -07:00
parent ac4337cabf
commit df600a105a
56 changed files with 2127 additions and 64 deletions
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131
src/xenia/cpu/frontend/test/bin/instr_cmpl.dis Normal file
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Disassembly of section .text:
0000000000100000 <test_cmpld_1>:
100000: 7c 23 20 40 cmpld r3,r4
100004: 7d 80 00 26 mfcr r12
100008: 4e 80 00 20 blr
000000000010000c <test_cmpld_1_constant>:
10000c: 38 60 00 01 li r3,1
100010: 78 63 07 c6 rldicr r3,r3,32,31
100014: 78 64 0f a4 rldicr r4,r3,1,62
100018: 7c 23 20 40 cmpld r3,r4
10001c: 7d 80 00 26 mfcr r12
100020: 4e 80 00 20 blr
0000000000100024 <test_cmpld_2>:
100024: 7c 23 20 40 cmpld r3,r4
100028: 7d 80 00 26 mfcr r12
10002c: 4e 80 00 20 blr
0000000000100030 <test_cmpld_2_constant>:
100030: 38 80 00 01 li r4,1
100034: 78 84 07 c6 rldicr r4,r4,32,31
100038: 78 83 0f a4 rldicr r3,r4,1,62
10003c: 7c 23 20 40 cmpld r3,r4
100040: 7d 80 00 26 mfcr r12
100044: 4e 80 00 20 blr
0000000000100048 <test_cmplw_1>:
100048: 7c 03 20 40 cmplw r3,r4
10004c: 7d 80 00 26 mfcr r12
100050: 4e 80 00 20 blr
0000000000100054 <test_cmplw_1_constant>:
100054: 38 60 00 01 li r3,1
100058: 78 63 07 c6 rldicr r3,r3,32,31
10005c: 78 64 0f a4 rldicr r4,r3,1,62
100060: 7c 03 20 40 cmplw r3,r4
100064: 7d 80 00 26 mfcr r12
100068: 4e 80 00 20 blr
000000000010006c <test_cmplw_2>:
10006c: 7c 03 20 40 cmplw r3,r4
100070: 7d 80 00 26 mfcr r12
100074: 4e 80 00 20 blr
0000000000100078 <test_cmplw_2_constant>:
100078: 38 80 00 01 li r4,1
10007c: 78 84 07 c6 rldicr r4,r4,32,31
100080: 78 83 0f a4 rldicr r3,r4,1,62
100084: 7c 03 20 40 cmplw r3,r4
100088: 7d 80 00 26 mfcr r12
10008c: 4e 80 00 20 blr
0000000000100090 <test_cmplw_3>:
100090: 7c 03 20 40 cmplw r3,r4
100094: 7d 80 00 26 mfcr r12
100098: 4e 80 00 20 blr
000000000010009c <test_cmplw_3_constant>:
10009c: 38 60 00 01 li r3,1
1000a0: 38 80 00 02 li r4,2
1000a4: 7c 03 20 40 cmplw r3,r4
1000a8: 7d 80 00 26 mfcr r12
1000ac: 4e 80 00 20 blr
00000000001000b0 <test_cmplw_4>:
1000b0: 7c 03 20 40 cmplw r3,r4
1000b4: 7d 80 00 26 mfcr r12
1000b8: 4e 80 00 20 blr
00000000001000bc <test_cmplw_4_constant>:
1000bc: 38 60 00 02 li r3,2
1000c0: 38 80 00 01 li r4,1
1000c4: 7c 03 20 40 cmplw r3,r4
1000c8: 7d 80 00 26 mfcr r12
1000cc: 4e 80 00 20 blr
00000000001000d0 <test_cmplw_5>:
1000d0: 7c 03 20 40 cmplw r3,r4
1000d4: 7d 80 00 26 mfcr r12
1000d8: 4e 80 00 20 blr
00000000001000dc <test_cmplw_5_constant>:
1000dc: 38 60 00 01 li r3,1
1000e0: 78 63 07 c6 rldicr r3,r3,32,31
1000e4: 78 64 0f a4 rldicr r4,r3,1,62
1000e8: 38 63 00 02 addi r3,r3,2
1000ec: 38 84 00 01 addi r4,r4,1
1000f0: 7c 03 20 40 cmplw r3,r4
1000f4: 7d 80 00 26 mfcr r12
1000f8: 4e 80 00 20 blr
00000000001000fc <test_cmplw_6>:
1000fc: 7c 03 20 40 cmplw r3,r4
100100: 7d 80 00 26 mfcr r12
100104: 4e 80 00 20 blr
0000000000100108 <test_cmplw_6_constant>:
100108: 3c 60 7f ff lis r3,32767
10010c: 60 63 ff ff ori r3,r3,65535
100110: 7c 63 18 f8 not r3,r3
100114: 38 80 00 01 li r4,1
100118: 78 84 f8 24 rldicr r4,r4,31,32
10011c: 7c 03 20 40 cmplw r3,r4
100120: 7d 80 00 26 mfcr r12
100124: 4e 80 00 20 blr
0000000000100128 <test_cmpl_1>:
100128: 7e 83 20 40 cmplw cr5,r3,r4
10012c: 7d 80 00 26 mfcr r12
100130: 4e 80 00 20 blr
0000000000100134 <test_cmpl_1_constant>:
100134: 38 60 00 01 li r3,1
100138: 38 80 00 02 li r4,2
10013c: 7e 83 20 40 cmplw cr5,r3,r4
100140: 7d 80 00 26 mfcr r12
100144: 4e 80 00 20 blr
0000000000100148 <test_cmpl_2>:
100148: 7d 83 20 40 cmplw cr3,r3,r4
10014c: 7d 80 00 26 mfcr r12
100150: 4e 80 00 20 blr
0000000000100154 <test_cmpl_2_constant>:
100154: 38 60 00 02 li r3,2
100158: 38 80 00 01 li r4,1
10015c: 7d 83 20 40 cmplw cr3,r3,r4
100160: 7d 80 00 26 mfcr r12
100164: 4e 80 00 20 blr