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Switching to premake. Probably with disasterous consequences.

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This commit is contained in:
Ben Vanik
2015-07-18 16:00:01 -07:00
parent 6c5d230f67
commit e0eb85bbbc
208 changed files with 1112 additions and 4162 deletions
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185
src/xenia/cpu/frontend/testing/instr_subfme.s Normal file
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test_subfme_one_ca_1:
#_ REGISTER_IN r10 0x00000000000103BF
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0x00000000000103BF
#_ REGISTER_OUT r3 0xfffffffffffefc40
#_ REGISTER_OUT r4 1
test_subfme_one_ca_1_constant:
lis r10, 1
ori r10, r10, 0x03BF
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0x00000000000103BF
#_ REGISTER_OUT r3 0xfffffffffffefc40
#_ REGISTER_OUT r4 1
test_subfme_one_ca_2:
#_ REGISTER_IN r10 0
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0
#_ REGISTER_OUT r3 -1
#_ REGISTER_OUT r4 1
test_subfme_one_ca_2_constant:
li r10, 0
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0
#_ REGISTER_OUT r3 -1
#_ REGISTER_OUT r4 1
test_subfme_one_ca_3:
#_ REGISTER_IN r10 1
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 1
#_ REGISTER_OUT r3 0xfffffffffffffffe
#_ REGISTER_OUT r4 1
test_subfme_one_ca_3_constant:
li r10, 1
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 1
#_ REGISTER_OUT r3 0xfffffffffffffffe
#_ REGISTER_OUT r4 1
test_subfme_one_ca_4:
#_ REGISTER_IN r10 0xFFFFFFFFFFFFFFFF
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0xFFFFFFFFFFFFFFFF
#_ REGISTER_OUT r3 0
#_ REGISTER_OUT r4 1
test_subfme_one_ca_4_constant:
li r10, -1
xor r3, r3, r3
not r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0xFFFFFFFFFFFFFFFF
#_ REGISTER_OUT r3 0
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_1:
#_ REGISTER_IN r10 0x00000000000103BF
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0x00000000000103BF
#_ REGISTER_OUT r3 0xfffffffffffefc3f
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_1_constant:
lis r10, 1
ori r10, r10, 0x03BF
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0x00000000000103BF
#_ REGISTER_OUT r3 0xfffffffffffefc3f
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_2:
#_ REGISTER_IN r10 0
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0
#_ REGISTER_OUT r3 0xfffffffffffffffe
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_2_constant:
li r10, 0
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0
#_ REGISTER_OUT r3 0xfffffffffffffffe
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_3:
#_ REGISTER_IN r10 1
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 1
#_ REGISTER_OUT r3 0xfffffffffffffffd
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_3_constant:
li r10, 1
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 1
#_ REGISTER_OUT r3 0xfffffffffffffffd
#_ REGISTER_OUT r4 1
test_subfme_zero_ca_4:
#_ REGISTER_IN r10 0xFFFFFFFFFFFFFFFF
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0xFFFFFFFFFFFFFFFF
#_ REGISTER_OUT r3 0xffffffffffffffff
#_ REGISTER_OUT r4 0
test_subfme_zero_ca_4_constant:
li r10, -1
xor r3, r3, r3
addic r3, r3, 1
subfme r3, r10
adde r4, r0, r0
blr
#_ REGISTER_OUT r10 0xFFFFFFFFFFFFFFFF
#_ REGISTER_OUT r3 0xffffffffffffffff
#_ REGISTER_OUT r4 0