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fmadd, orc, extsh, extsw.

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This commit is contained in:
Ben Vanik
2013-05-31 01:00:00 -07:00
parent 9bb36c7404
commit e6195c4086
2 changed files with 74 additions and 8 deletions
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23
src/xenia/cpu/x64/x64_emit_fpu.cc
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@@ -290,8 +290,27 @@ XEEMITTER(fsqrtsx, 0xEC00002C, A )(X64Emitter& e, X86Compiler& c, InstrDat
// Floating-point multiply-add (A-9)
XEEMITTER(fmaddx, 0xFC00003A, A )(X64Emitter& e, X86Compiler& c, InstrData& i) {
XEINSTRNOTIMPLEMENTED();
return 1;
// frD <- (frA x frC) + frB
XmmVar v(c.newXmmVar());
// TODO(benvanik): I'm sure there's an SSE op for this.
// NOTE: we do (frB - [frA x frC]) as that's pretty much the same.
c.movq(v, e.fpr_value(i.A.FRA));
c.mulsd(v, e.fpr_value(i.A.FRC));
c.addsd(v, e.fpr_value(i.A.FRB));
e.update_fpr_value(i.A.FRT, v);
// TODO(benvanik): update status/control register.
if (i.A.Rc) {
// With cr0 update.
XEASSERTALWAYS();
//e.update_cr_with_cond(0, v);
XEINSTRNOTIMPLEMENTED();
return 1;
}
return 0;
}
XEEMITTER(fmaddsx, 0xEC00003A, A )(X64Emitter& e, X86Compiler& c, InstrData& i) {