Merge branch 'master' of https://github.com/xenia-project/xenia into canary_experimental

This commit is contained in:
Gliniak
2022-06-26 20:11:33 +02:00
85 changed files with 4229 additions and 1068 deletions

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@@ -1239,7 +1239,7 @@ bool D3D12CommandProcessor::SetupContext() {
apply_gamma_root_descriptor_range_source.RangeType =
D3D12_DESCRIPTOR_RANGE_TYPE_SRV;
apply_gamma_root_descriptor_range_source.NumDescriptors = 1;
apply_gamma_root_descriptor_range_source.BaseShaderRegister = 0;
apply_gamma_root_descriptor_range_source.BaseShaderRegister = 1;
apply_gamma_root_descriptor_range_source.RegisterSpace = 0;
apply_gamma_root_descriptor_range_source.OffsetInDescriptorsFromTableStart =
0;
@@ -1258,7 +1258,7 @@ bool D3D12CommandProcessor::SetupContext() {
apply_gamma_root_descriptor_range_ramp.RangeType =
D3D12_DESCRIPTOR_RANGE_TYPE_SRV;
apply_gamma_root_descriptor_range_ramp.NumDescriptors = 1;
apply_gamma_root_descriptor_range_ramp.BaseShaderRegister = 1;
apply_gamma_root_descriptor_range_ramp.BaseShaderRegister = 0;
apply_gamma_root_descriptor_range_ramp.RegisterSpace = 0;
apply_gamma_root_descriptor_range_ramp.OffsetInDescriptorsFromTableStart = 0;
{
@@ -1968,7 +1968,7 @@ void D3D12CommandProcessor::IssueSwap(uint32_t frontbuffer_ptr,
}
SetExternalPipeline(apply_gamma_pipeline);
SubmitBarriers();
uint32_t group_count_x = (uint32_t(swap_texture_desc.Width) + 7) / 8;
uint32_t group_count_x = (uint32_t(swap_texture_desc.Width) + 15) / 16;
uint32_t group_count_y = (uint32_t(swap_texture_desc.Height) + 7) / 8;
deferred_command_list_.D3DDispatch(group_count_x, group_count_y, 1);
@@ -2189,7 +2189,9 @@ bool D3D12CommandProcessor::IssueDraw(xenos::PrimitiveType primitive_type,
return false;
}
// Translate the shaders and create the pipeline if needed.
// Create the pipeline (for this, need the actually used render target formats
// from the render target cache), translating the shaders - doing this now to
// obtain the used textures.
D3D12Shader::D3D12Translation* vertex_shader_translation =
static_cast<D3D12Shader::D3D12Translation*>(
vertex_shader->GetOrCreateTranslation(
@@ -3479,7 +3481,7 @@ void D3D12CommandProcessor::UpdateSystemConstantValues(
edram_32bpp_tile_pitch_dwords_scaled;
}
// Color exponent bias and output index mapping or ROV render target writing.
// Color exponent bias and ROV render target writing.
for (uint32_t i = 0; i < 4; ++i) {
reg::RB_COLOR_INFO color_info = color_infos[i];
// Exponent bias is in bits 20:25 of RB_COLOR_INFO.

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@@ -78,7 +78,7 @@ namespace d3d12 {
// Generated with `xb buildshaders`.
namespace shaders {
#include "xenia/gpu/shaders/bytecode/d3d12_5_1/clear_uint2_ps.h"
#include "xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_vs.h"
#include "xenia/gpu/shaders/bytecode/d3d12_5_1/fullscreen_cw_vs.h"
#include "xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_1xmsaa_cs.h"
#include "xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_2xmsaa_cs.h"
#include "xenia/gpu/shaders/bytecode/d3d12_5_1/host_depth_store_4xmsaa_cs.h"
@@ -954,9 +954,10 @@ bool D3D12RenderTargetCache::Initialize() {
D3D12_GRAPHICS_PIPELINE_STATE_DESC uint32_rtv_clear_pipeline_desc = {};
uint32_rtv_clear_pipeline_desc.pRootSignature =
uint32_rtv_clear_root_signature_;
uint32_rtv_clear_pipeline_desc.VS.pShaderBytecode = shaders::fullscreen_vs;
uint32_rtv_clear_pipeline_desc.VS.pShaderBytecode =
shaders::fullscreen_cw_vs;
uint32_rtv_clear_pipeline_desc.VS.BytecodeLength =
sizeof(shaders::fullscreen_vs);
sizeof(shaders::fullscreen_cw_vs);
uint32_rtv_clear_pipeline_desc.PS.pShaderBytecode = shaders::clear_uint2_ps;
uint32_rtv_clear_pipeline_desc.PS.BytecodeLength =
sizeof(shaders::clear_uint2_ps);

View File

@@ -971,9 +971,9 @@ D3D12TextureCache::SamplerParameters D3D12TextureCache::GetSamplerParameters(
parameters.border_color = fetch.border_color;
uint32_t mip_min_level;
texture_util::GetSubresourcesFromFetchConstant(
fetch, nullptr, nullptr, nullptr, nullptr, nullptr, &mip_min_level,
nullptr, binding.mip_filter);
texture_util::GetSubresourcesFromFetchConstant(fetch, nullptr, nullptr,
nullptr, nullptr, nullptr,
&mip_min_level, nullptr);
parameters.mip_min_level = mip_min_level;
xenos::AnisoFilter aniso_filter =
@@ -982,6 +982,10 @@ D3D12TextureCache::SamplerParameters D3D12TextureCache::GetSamplerParameters(
: binding.aniso_filter;
aniso_filter = std::min(aniso_filter, xenos::AnisoFilter::kMax_16_1);
parameters.aniso_filter = aniso_filter;
xenos::TextureFilter mip_filter =
binding.mip_filter == xenos::TextureFilter::kUseFetchConst
? fetch.mip_filter
: binding.mip_filter;
if (aniso_filter != xenos::AnisoFilter::kDisabled) {
parameters.mag_linear = 1;
parameters.min_linear = 1;
@@ -997,12 +1001,9 @@ D3D12TextureCache::SamplerParameters D3D12TextureCache::GetSamplerParameters(
? fetch.min_filter
: binding.min_filter;
parameters.min_linear = min_filter == xenos::TextureFilter::kLinear;
xenos::TextureFilter mip_filter =
binding.mip_filter == xenos::TextureFilter::kUseFetchConst
? fetch.mip_filter
: binding.mip_filter;
parameters.mip_linear = mip_filter == xenos::TextureFilter::kLinear;
}
parameters.mip_base_map = mip_filter == xenos::TextureFilter::kBaseMap;
return parameters;
}
@@ -1046,24 +1047,57 @@ void D3D12TextureCache::WriteSampler(SamplerParameters parameters,
desc.AddressU = kAddressModeMap[uint32_t(parameters.clamp_x)];
desc.AddressV = kAddressModeMap[uint32_t(parameters.clamp_y)];
desc.AddressW = kAddressModeMap[uint32_t(parameters.clamp_z)];
// LOD is calculated in shaders.
// LOD biasing is performed in shaders.
desc.MipLODBias = 0.0f;
desc.ComparisonFunc = D3D12_COMPARISON_FUNC_NEVER;
// TODO(Triang3l): Border colors k_ACBYCR_BLACK and k_ACBCRY_BLACK.
if (parameters.border_color == xenos::BorderColor::k_AGBR_White) {
desc.BorderColor[0] = 1.0f;
desc.BorderColor[1] = 1.0f;
desc.BorderColor[2] = 1.0f;
desc.BorderColor[3] = 1.0f;
} else {
desc.BorderColor[0] = 0.0f;
desc.BorderColor[1] = 0.0f;
desc.BorderColor[2] = 0.0f;
desc.BorderColor[3] = 0.0f;
switch (parameters.border_color) {
case xenos::BorderColor::k_ABGR_White:
desc.BorderColor[0] = 1.0f;
desc.BorderColor[1] = 1.0f;
desc.BorderColor[2] = 1.0f;
desc.BorderColor[3] = 1.0f;
break;
case xenos::BorderColor::k_ACBYCR_Black:
desc.BorderColor[0] = 0.5f;
desc.BorderColor[1] = 0.0f;
desc.BorderColor[2] = 0.5f;
desc.BorderColor[3] = 0.0f;
break;
case xenos::BorderColor::k_ACBCRY_Black:
desc.BorderColor[0] = 0.0f;
desc.BorderColor[1] = 0.5f;
desc.BorderColor[2] = 0.5f;
desc.BorderColor[3] = 0.0f;
break;
default:
assert_true(parameters.border_color == xenos::BorderColor::k_ABGR_Black);
desc.BorderColor[0] = 0.0f;
desc.BorderColor[1] = 0.0f;
desc.BorderColor[2] = 0.0f;
desc.BorderColor[3] = 0.0f;
break;
}
desc.MinLOD = float(parameters.mip_min_level);
// Maximum mip level is in the texture resource itself.
desc.MaxLOD = FLT_MAX;
if (parameters.mip_base_map) {
// "It is undefined whether LOD clamping based on MinLOD and MaxLOD Sampler
// states should happen before or after deciding if magnification is
// occuring" - Direct3D 11.3 Functional Specification.
// Using the GL_NEAREST / GL_LINEAR minification filter emulation logic
// described in the Vulkan VkSamplerCreateInfo specification, preserving
// magnification vs. minification - point mip sampling (usable only without
// anisotropic filtering on Direct3D 12) and MaxLOD 0.25. With anisotropic
// filtering, magnification vs. minification doesn't matter as the filter is
// always linear for both on Direct3D 12 - but linear filtering specifically
// is what must not be done for kBaseMap, so setting MaxLOD to MinLOD.
desc.MaxLOD = desc.MinLOD;
if (parameters.aniso_filter == xenos::AnisoFilter::kDisabled) {
assert_false(parameters.mip_linear);
desc.MaxLOD += 0.25f;
}
} else {
// Maximum mip level is in the texture resource itself.
desc.MaxLOD = FLT_MAX;
}
ID3D12Device* device = command_processor_.GetD3D12Provider().GetDevice();
device->CreateSampler(&desc, handle);
}

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@@ -58,7 +58,9 @@ class D3D12TextureCache final : public TextureCache {
uint32_t mip_linear : 1; // 14
xenos::AnisoFilter aniso_filter : 3; // 17
uint32_t mip_min_level : 4; // 21
// Maximum mip level is in the texture resource itself.
uint32_t mip_base_map : 1; // 22
// Maximum mip level is in the texture resource itself, but mip_base_map
// can be used to limit fetching to mip_min_level.
};
SamplerParameters() : value(0) { static_assert_size(*this, sizeof(value)); }
@@ -150,9 +152,9 @@ class D3D12TextureCache final : public TextureCache {
}
// Returns the ID3D12Resource of the front buffer texture (in
// PIXEL_SHADER_RESOURCE state), or nullptr in case of failure, and writes the
// description of its SRV. May call LoadTextureData, so the same restrictions
// (such as about descriptor heap change possibility) apply.
// NON_PIXEL_SHADER_RESOURCE state), or nullptr in case of failure, and writes
// the description of its SRV. May call LoadTextureData, so the same
// restrictions (such as about descriptor heap change possibility) apply.
ID3D12Resource* RequestSwapTexture(
D3D12_SHADER_RESOURCE_VIEW_DESC& srv_desc_out,
xenos::TextureFormat& format_out);