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Primitive type makes rasterization state dirty too!

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This commit is contained in:
Dr. Chat
2016-03-23 16:19:18 -05:00
parent 7b962e59a4
commit e72e283e79
2 changed files with 9 additions and 1 deletions
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8
src/xenia/gpu/vulkan/pipeline_cache.cc
View File

@@ -936,6 +936,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizationState(
auto& state_info = update_rasterization_state_info_; auto& state_info = update_rasterization_state_info_;
bool dirty = false; bool dirty = false;
dirty |= regs.primitive_type != primitive_type;
dirty |= SetShadowRegister(&regs.pa_su_sc_mode_cntl, dirty |= SetShadowRegister(&regs.pa_su_sc_mode_cntl,
XE_GPU_REG_PA_SU_SC_MODE_CNTL); XE_GPU_REG_PA_SU_SC_MODE_CNTL);
dirty |= SetShadowRegister(&regs.pa_sc_screen_scissor_tl, dirty |= SetShadowRegister(&regs.pa_sc_screen_scissor_tl,
@@ -944,6 +945,7 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizationState(
XE_GPU_REG_PA_SC_SCREEN_SCISSOR_BR); XE_GPU_REG_PA_SC_SCREEN_SCISSOR_BR);
dirty |= SetShadowRegister(&regs.multi_prim_ib_reset_index, dirty |= SetShadowRegister(&regs.multi_prim_ib_reset_index,
XE_GPU_REG_VGT_MULTI_PRIM_IB_RESET_INDX); XE_GPU_REG_VGT_MULTI_PRIM_IB_RESET_INDX);
regs.primitive_type = primitive_type;
XXH64_update(&hash_state_, &regs, sizeof(regs)); XXH64_update(&hash_state_, &regs, sizeof(regs));
if (!dirty) { if (!dirty) {
return UpdateStatus::kCompatible; return UpdateStatus::kCompatible;
@@ -983,6 +985,10 @@ PipelineCache::UpdateStatus PipelineCache::UpdateRasterizationState(
case 2: case 2:
state_info.cullMode = VK_CULL_MODE_BACK_BIT; state_info.cullMode = VK_CULL_MODE_BACK_BIT;
break; break;
case 3:
// Cull both sides?
assert_always();
break;
} }
if (regs.pa_su_sc_mode_cntl & 0x4) { if (regs.pa_su_sc_mode_cntl & 0x4) {
state_info.frontFace = VK_FRONT_FACE_CLOCKWISE; state_info.frontFace = VK_FRONT_FACE_CLOCKWISE;
@@ -1013,6 +1019,8 @@ PipelineCache::UpdateStatus PipelineCache::UpdateMultisampleState() {
state_info.pNext = nullptr; state_info.pNext = nullptr;
state_info.flags = 0; state_info.flags = 0;
// PA_SC_AA_CONFIG MSAA_NUM_SAMPLES
// PA_SU_SC_MODE_CNTL MSAA_ENABLE
state_info.rasterizationSamples = VK_SAMPLE_COUNT_1_BIT; state_info.rasterizationSamples = VK_SAMPLE_COUNT_1_BIT;
state_info.sampleShadingEnable = VK_FALSE; state_info.sampleShadingEnable = VK_FALSE;
state_info.minSampleShading = 0; state_info.minSampleShading = 0;

2
src/xenia/gpu/vulkan/pipeline_cache.h
View File

@@ -205,11 +205,11 @@ class PipelineCache {
VkPipelineViewportStateCreateInfo update_viewport_state_info_; VkPipelineViewportStateCreateInfo update_viewport_state_info_;
struct UpdateRasterizationStateRegisters { struct UpdateRasterizationStateRegisters {
PrimitiveType primitive_type;
uint32_t pa_su_sc_mode_cntl; uint32_t pa_su_sc_mode_cntl;
uint32_t pa_sc_screen_scissor_tl; uint32_t pa_sc_screen_scissor_tl;
uint32_t pa_sc_screen_scissor_br; uint32_t pa_sc_screen_scissor_br;
uint32_t multi_prim_ib_reset_index; uint32_t multi_prim_ib_reset_index;
PrimitiveType prim_type;
UpdateRasterizationStateRegisters() { Reset(); } UpdateRasterizationStateRegisters() { Reset(); }
void Reset() { std::memset(this, 0, sizeof(*this)); } void Reset() { std::memset(this, 0, sizeof(*this)); }