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Moving byte order/memory access to poly.

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This commit is contained in:
Ben Vanik
2014-07-17 19:20:17 -07:00
parent ce70978ef6
commit ec4f41fec4
42 changed files with 608 additions and 486 deletions
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50
src/alloy/backend/ivm/ivm_intcode.cc
View File

@@ -1405,7 +1405,7 @@ uint32_t IntCode_LOAD_I16(IntCodeState& ics, const IntCode* i) {
uint32_t address = ics.rf[i->src1_reg].u32;
if (DYNAMIC_REGISTER_ACCESS_CHECK(address)) {
ics.rf[i->dest_reg].i16 =
XESWAP16(ics.thread_state->memory()->LoadI16(address));
poly::byte_swap(ics.thread_state->memory()->LoadI16(address));
return IA_NEXT;
}
DPRINT("%d (%X) = load.i16 %.8X\n", *((int16_t*)(ics.membase + address)),
@@ -1418,7 +1418,7 @@ uint32_t IntCode_LOAD_I32(IntCodeState& ics, const IntCode* i) {
uint32_t address = ics.rf[i->src1_reg].u32;
if (DYNAMIC_REGISTER_ACCESS_CHECK(address)) {
ics.rf[i->dest_reg].i32 =
XESWAP32(ics.thread_state->memory()->LoadI32(address));
poly::byte_swap(ics.thread_state->memory()->LoadI32(address));
return IA_NEXT;
}
DFLUSH();
@@ -1432,7 +1432,7 @@ uint32_t IntCode_LOAD_I64(IntCodeState& ics, const IntCode* i) {
uint32_t address = ics.rf[i->src1_reg].u32;
if (DYNAMIC_REGISTER_ACCESS_CHECK(address)) {
ics.rf[i->dest_reg].i64 =
XESWAP64(ics.thread_state->memory()->LoadI64(address));
poly::byte_swap(ics.thread_state->memory()->LoadI64(address));
return IA_NEXT;
}
DPRINT("%lld (%llX) = load.i64 %.8X\n", *((int64_t*)(ics.membase + address)),
@@ -1498,8 +1498,8 @@ uint32_t IntCode_STORE_I8(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_STORE_I16(IntCodeState& ics, const IntCode* i) {
uint32_t address = ics.rf[i->src1_reg].u32;
if (DYNAMIC_REGISTER_ACCESS_CHECK(address)) {
ics.thread_state->memory()->StoreI16(address,
XESWAP16(ics.rf[i->src2_reg].i16));
ics.thread_state->memory()->StoreI16(
address, poly::byte_swap(ics.rf[i->src2_reg].i16));
return IA_NEXT;
}
DPRINT("store.i16 %.8X = %d (%X)\n", address, ics.rf[i->src2_reg].i16,
@@ -1512,8 +1512,8 @@ uint32_t IntCode_STORE_I16(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_STORE_I32(IntCodeState& ics, const IntCode* i) {
uint32_t address = ics.rf[i->src1_reg].u32;
if (DYNAMIC_REGISTER_ACCESS_CHECK(address)) {
ics.thread_state->memory()->StoreI32(address,
XESWAP32(ics.rf[i->src2_reg].i32));
ics.thread_state->memory()->StoreI32(
address, poly::byte_swap(ics.rf[i->src2_reg].i32));
return IA_NEXT;
}
DPRINT("store.i32 %.8X = %d (%X)\n", address, ics.rf[i->src2_reg].i32,
@@ -1526,8 +1526,8 @@ uint32_t IntCode_STORE_I32(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_STORE_I64(IntCodeState& ics, const IntCode* i) {
uint32_t address = ics.rf[i->src1_reg].u32;
if (DYNAMIC_REGISTER_ACCESS_CHECK(address)) {
ics.thread_state->memory()->StoreI64(address,
XESWAP64(ics.rf[i->src2_reg].i64));
ics.thread_state->memory()->StoreI64(
address, poly::byte_swap(ics.rf[i->src2_reg].i64));
return IA_NEXT;
}
DPRINT("store.i64 %.8X = %lld (%llX)\n", address, ics.rf[i->src2_reg].i64,
@@ -2210,13 +2210,13 @@ int Translate_VECTOR_COMPARE_SGT(TranslationContext& ctx, Instr* i) {
return DispatchToC(ctx, i, fns[i->flags]);
}
uint32_t IntCode_VECTOR_COMPARE_SGE_I8(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_SGE_I8(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(int8_t, b16, b16, 16, >= )};
uint32_t IntCode_VECTOR_COMPARE_SGE_I16(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_SGE_I16(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(int16_t, s8, s8, 8, >= )};
uint32_t IntCode_VECTOR_COMPARE_SGE_I32(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_SGE_I32(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(int32_t, i4, i4, 4, >= )};
uint32_t IntCode_VECTOR_COMPARE_SGE_F32(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_SGE_F32(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(float, f4, i4, 4, >= )};
int Translate_VECTOR_COMPARE_SGE(TranslationContext& ctx, Instr* i) {
static IntCodeFn fns[] = {
@@ -2228,13 +2228,13 @@ int Translate_VECTOR_COMPARE_SGE(TranslationContext& ctx, Instr* i) {
return DispatchToC(ctx, i, fns[i->flags]);
}
uint32_t IntCode_VECTOR_COMPARE_UGT_I8(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_UGT_I8(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(uint8_t, b16, b16, 16, > )};
uint32_t IntCode_VECTOR_COMPARE_UGT_I16(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_UGT_I16(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(uint16_t, s8, s8, 8, > )};
uint32_t IntCode_VECTOR_COMPARE_UGT_I32(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_UGT_I32(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(uint32_t, i4, i4, 4, > )};
uint32_t IntCode_VECTOR_COMPARE_UGT_F32(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_UGT_F32(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(float, f4, i4, 4, > )};
int Translate_VECTOR_COMPARE_UGT(TranslationContext& ctx, Instr* i) {
static IntCodeFn fns[] = {
@@ -2246,13 +2246,13 @@ int Translate_VECTOR_COMPARE_UGT(TranslationContext& ctx, Instr* i) {
return DispatchToC(ctx, i, fns[i->flags]);
}
uint32_t IntCode_VECTOR_COMPARE_UGE_I8(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_UGE_I8(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(uint8_t, b16, b16, 16, >= )};
uint32_t IntCode_VECTOR_COMPARE_UGE_I16(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_UGE_I16(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(uint16_t, s8, s8, 8, >= )};
uint32_t IntCode_VECTOR_COMPARE_UGE_I32(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_UGE_I32(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(uint32_t, i4, i4, 4, >= )};
uint32_t IntCode_VECTOR_COMPARE_UGE_F32(IntCodeState& ics, const IntCode* i) {
uint32_t IntCode_VECTOR_COMPARE_UGE_F32(IntCodeState& ics, const IntCode* i){
VECTOR_COMPARER(float, f4, i4, 4, >= )};
int Translate_VECTOR_COMPARE_UGE(TranslationContext& ctx, Instr* i) {
static IntCodeFn fns[] = {
@@ -3526,22 +3526,22 @@ int Translate_ROTATE_LEFT(TranslationContext& ctx, Instr* i) {
}
uint32_t IntCode_BYTE_SWAP_I16(IntCodeState& ics, const IntCode* i) {
ics.rf[i->dest_reg].i16 = XESWAP16(ics.rf[i->src1_reg].i16);
ics.rf[i->dest_reg].i16 = poly::byte_swap(ics.rf[i->src1_reg].i16);
return IA_NEXT;
}
uint32_t IntCode_BYTE_SWAP_I32(IntCodeState& ics, const IntCode* i) {
ics.rf[i->dest_reg].i32 = XESWAP32(ics.rf[i->src1_reg].i32);
ics.rf[i->dest_reg].i32 = poly::byte_swap(ics.rf[i->src1_reg].i32);
return IA_NEXT;
}
uint32_t IntCode_BYTE_SWAP_I64(IntCodeState& ics, const IntCode* i) {
ics.rf[i->dest_reg].i64 = XESWAP64(ics.rf[i->src1_reg].i64);
ics.rf[i->dest_reg].i64 = poly::byte_swap(ics.rf[i->src1_reg].i64);
return IA_NEXT;
}
uint32_t IntCode_BYTE_SWAP_V128(IntCodeState& ics, const IntCode* i) {
const vec128_t& src1 = ics.rf[i->src1_reg].v128;
vec128_t& dest = ics.rf[i->dest_reg].v128;
for (int n = 0; n < 4; n++) {
VECI4(dest, n) = XESWAP32(VECI4(src1, n));
VECI4(dest, n) = poly::byte_swap(VECI4(src1, n));
}
return IA_NEXT;
}

1
src/alloy/core.h
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@@ -11,7 +11,6 @@
#define ALLOY_CORE_H_
// TODO(benvanik): move the common stuff into here?
#include <xenia/byte_order.h>
#include <xenia/config.h>
#include <xenia/logging.h>
#include <xenia/malloc.h>

4
src/alloy/frontend/ppc/ppc_emit_altivec.cc
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@@ -1343,7 +1343,9 @@ int InstrEmit_vsldoi_(PPCHIRBuilder& f, uint32_t vd, uint32_t va, uint32_t vb,
// (ABCD ABCD) << 4b = (BCDA)
// (VA << SH) OR (VB >> (16 - SH))
vec128_t shift = *((vec128_t*)(__vsldoi_table[sh]));
for (int i = 0; i < 4; ++i) shift.i4[i] = XESWAP32BE(shift.i4[i]);
for (int i = 0; i < 4; ++i) {
shift.i4[i] = poly::byte_swap(shift.i4[i]);
}
Value* control = f.LoadConstant(shift);
Value* v = f.Permute(control, f.LoadVR(va), f.LoadVR(vb), INT8_TYPE);
f.StoreVR(vd, v);

2
src/alloy/frontend/ppc/ppc_hir_builder.cc
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@@ -81,7 +81,7 @@ int PPCHIRBuilder::Emit(FunctionInfo* symbol_info, bool with_debug_info) {
for (uint64_t address = start_address, offset = 0; address <= end_address;
address += 4, offset++) {
i.address = address;
i.code = XEGETUINT32BE(p + address);
i.code = poly::load_and_swap<uint32_t>(p + address);
// TODO(benvanik): find a way to avoid using the opcode tables.
i.type = GetInstrType(i.code);

5
src/alloy/frontend/ppc/ppc_scanner.cc
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@@ -14,6 +14,7 @@
#include <alloy/frontend/ppc/ppc_frontend.h>
#include <alloy/frontend/ppc/ppc_instr.h>
#include <alloy/runtime/runtime.h>
#include <poly/memory.h>
namespace alloy {
namespace frontend {
@@ -58,7 +59,7 @@ int PPCScanner::FindExtents(FunctionInfo* symbol_info) {
InstrData i;
while (true) {
i.address = address;
i.code = XEGETUINT32BE(p + address);
i.code = poly::load_and_swap<uint32_t>(p + address);
// If we fetched 0 assume that we somehow hit one of the awesome
// 'no really we meant to end after that bl' functions.
@@ -291,7 +292,7 @@ std::vector<BlockInfo> PPCScanner::FindBlocks(FunctionInfo* symbol_info) {
InstrData i;
for (uint64_t address = start_address; address <= end_address; address += 4) {
i.address = address;
i.code = XEGETUINT32BE(p + address);
i.code = poly::load_and_swap<uint32_t>(p + address);
if (!i.code) {
continue;
}

2
src/alloy/frontend/ppc/ppc_translator.cc
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@@ -174,7 +174,7 @@ void PPCTranslator::DumpSource(runtime::FunctionInfo* symbol_info,
for (uint64_t address = start_address, offset = 0; address <= end_address;
address += 4, offset++) {
i.address = address;
i.code = XEGETUINT32BE(p + address);
i.code = poly::load_and_swap<uint32_t>(p + address);
// TODO(benvanik): find a way to avoid using the opcode tables.
i.type = GetInstrType(i.code);

8
src/alloy/hir/value.cc
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@@ -572,17 +572,17 @@ void Value::ByteSwap() {
constant.i8 = constant.i8;
break;
case INT16_TYPE:
constant.i16 = XESWAP16(constant.i16);
constant.i16 = poly::byte_swap(constant.i16);
break;
case INT32_TYPE:
constant.i32 = XESWAP32(constant.i32);
constant.i32 = poly::byte_swap(constant.i32);
break;
case INT64_TYPE:
constant.i64 = XESWAP64(constant.i64);
constant.i64 = poly::byte_swap(constant.i64);
break;
case VEC128_TYPE:
for (int n = 0; n < 4; n++) {
constant.v128.i4[n] = XESWAP32(constant.v128.i4[n]);
constant.v128.i4[n] = poly::byte_swap(constant.v128.i4[n]);
}
break;
default: