VectorRotateLeft for vrl*.
This commit is contained in:
@@ -3640,30 +3640,26 @@ int Translate_VECTOR_SHA(TranslationContext& ctx, Instr* i) {
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return DispatchToC(ctx, i, fns[i->flags]);
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}
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template <typename T>
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T ROTL(T v, int8_t sh) {
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return (T(v) << sh) | (T(v) >> ((sizeof(T) * 8) - sh));
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}
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uint32_t IntCode_ROTATE_LEFT_I8(IntCodeState& ics, const IntCode* i) {
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ics.rf[i->dest_reg].i8 =
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ROTL<uint8_t>(ics.rf[i->src1_reg].i8, ics.rf[i->src2_reg].i8);
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ics.rf[i->dest_reg].i8 = poly::rotate_left<uint8_t>(ics.rf[i->src1_reg].i8,
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ics.rf[i->src2_reg].i8);
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return IA_NEXT;
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}
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uint32_t IntCode_ROTATE_LEFT_I16(IntCodeState& ics, const IntCode* i) {
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ics.rf[i->dest_reg].i16 =
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ROTL<uint16_t>(ics.rf[i->src1_reg].i16, ics.rf[i->src2_reg].i8);
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ics.rf[i->dest_reg].i16 = poly::rotate_left<uint16_t>(ics.rf[i->src1_reg].i16,
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ics.rf[i->src2_reg].i8);
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return IA_NEXT;
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}
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uint32_t IntCode_ROTATE_LEFT_I32(IntCodeState& ics, const IntCode* i) {
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// TODO(benvanik): use _rtol on vc++
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ics.rf[i->dest_reg].i32 =
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ROTL<uint32_t>(ics.rf[i->src1_reg].i32, ics.rf[i->src2_reg].i8);
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ics.rf[i->dest_reg].i32 = poly::rotate_left<uint32_t>(ics.rf[i->src1_reg].i32,
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ics.rf[i->src2_reg].i8);
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return IA_NEXT;
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}
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uint32_t IntCode_ROTATE_LEFT_I64(IntCodeState& ics, const IntCode* i) {
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// TODO(benvanik): use _rtol64 on vc++
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ics.rf[i->dest_reg].i64 =
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ROTL<uint64_t>(ics.rf[i->src1_reg].i64, ics.rf[i->src2_reg].i8);
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ics.rf[i->dest_reg].i64 = poly::rotate_left<uint64_t>(ics.rf[i->src1_reg].i64,
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ics.rf[i->src2_reg].i8);
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return IA_NEXT;
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}
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int Translate_ROTATE_LEFT(TranslationContext& ctx, Instr* i) {
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@@ -3675,6 +3671,11 @@ int Translate_ROTATE_LEFT(TranslationContext& ctx, Instr* i) {
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return DispatchToC(ctx, i, fns[i->dest->type]);
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}
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int Translate_VECTOR_ROTATE_LEFT(TranslationContext& ctx, Instr* i) {
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assert_always();
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return 1;
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}
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uint32_t IntCode_BYTE_SWAP_I16(IntCodeState& ics, const IntCode* i) {
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ics.rf[i->dest_reg].i16 = poly::byte_swap(ics.rf[i->src1_reg].i16);
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return IA_NEXT;
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@@ -4218,11 +4219,12 @@ static const TranslateFn dispatch_table[] = {
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Translate_SHL, Translate_VECTOR_SHL,
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Translate_SHR, Translate_VECTOR_SHR,
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Translate_SHA, Translate_VECTOR_SHA,
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Translate_ROTATE_LEFT, Translate_BYTE_SWAP,
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Translate_CNTLZ, Translate_INSERT,
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Translate_EXTRACT, Translate_SPLAT,
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Translate_PERMUTE, Translate_SWIZZLE,
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Translate_PACK, Translate_UNPACK,
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Translate_ROTATE_LEFT, Translate_VECTOR_ROTATE_LEFT,
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Translate_BYTE_SWAP, Translate_CNTLZ,
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Translate_INSERT, Translate_EXTRACT,
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Translate_SPLAT, Translate_PERMUTE,
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Translate_SWIZZLE, Translate_PACK,
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Translate_UNPACK,
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TranslateInvalid, // Translate_COMPARE_EXCHANGE,
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Translate_ATOMIC_EXCHANGE,
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TranslateInvalid, // Translate_ATOMIC_ADD,
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@@ -550,6 +550,7 @@ Address X64Emitter::GetXmmConstPtr(XmmConst id) {
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/* XMMUnsignedDwordMax */ vec128i(0xFFFFFFFFu, 0x00000000u,
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0xFFFFFFFFu, 0x00000000u),
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/* XMM255 */ vec128f(255.0f, 255.0f, 255.0f, 255.0f),
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/* XMMPI32 */ vec128i(32, 32, 32, 32),
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/* XMMSignMaskI8 */ vec128i(0x80808080u, 0x80808080u,
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0x80808080u, 0x80808080u),
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/* XMMSignMaskI16 */ vec128i(0x80008000u, 0x80008000u,
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@@ -60,6 +60,7 @@ enum XmmConst {
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XMMShiftByteMask,
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XMMUnsignedDwordMax,
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XMM255,
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XMMPI32,
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XMMSignMaskI8,
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XMMSignMaskI16,
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XMMSignMaskI32,
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@@ -4475,6 +4475,76 @@ EMITTER_OPCODE_TABLE(
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ROTATE_LEFT_I64);
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// ============================================================================
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// OPCODE_VECTOR_ROTATE_LEFT
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// ============================================================================
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// TODO(benvanik): AVX512 has a native variable rotate (rolv).
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EMITTER(VECTOR_ROTATE_LEFT_V128, MATCH(I<OPCODE_VECTOR_ROTATE_LEFT, V128<>, V128<>, V128<>>)) {
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static __m128i EmulateVectorRotateLeftI8(__m128i src1, __m128i src2) {
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alignas(16) __m128i value;
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alignas(16) __m128i shamt;
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_mm_store_si128(&value, src1);
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_mm_store_si128(&shamt, src2);
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for (size_t i = 0; i < 16; ++i) {
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value.m128i_u8[i] = poly::rotate_left<uint8_t>(
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value.m128i_u8[i], shamt.m128i_u8[i] & 0x3);
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}
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return _mm_load_si128(&value);
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}
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static __m128i EmulateVectorRotateLeftI16(__m128i src1, __m128i src2) {
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alignas(16) __m128i value;
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alignas(16) __m128i shamt;
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_mm_store_si128(&value, src1);
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_mm_store_si128(&shamt, src2);
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for (size_t i = 0; i < 8; ++i) {
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value.m128i_u16[i] = poly::rotate_left<uint16_t>(
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value.m128i_u16[i], shamt.m128i_u16[i] & 0xF);
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}
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return _mm_load_si128(&value);
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}
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static void Emit(X64Emitter& e, const EmitArgType& i) {
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switch (i.instr->flags) {
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case INT8_TYPE:
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// TODO(benvanik): native version (with shift magic).
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e.lea(e.r8, e.StashXmm(i.src1));
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e.lea(e.r9, e.StashXmm(i.src2));
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e.CallNativeSafe(reinterpret_cast<void*>(EmulateVectorRotateLeftI8));
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e.vmovaps(i.dest, e.xmm0);
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break;
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case INT16_TYPE:
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// TODO(benvanik): native version (with shift magic).
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e.lea(e.r8, e.StashXmm(i.src1));
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e.lea(e.r9, e.StashXmm(i.src2));
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e.CallNativeSafe(reinterpret_cast<void*>(EmulateVectorRotateLeftI16));
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e.vmovaps(i.dest, e.xmm0);
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break;
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case INT32_TYPE: {
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Xmm temp = i.dest;
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if (i.dest == i.src1 || i.dest == i.src2) {
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temp = e.xmm2;
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}
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// Shift left (to get high bits):
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e.vpand(e.xmm0, i.src2, e.GetXmmConstPtr(XMMShiftMaskPS));
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e.vpsllvd(e.xmm1, i.src1, e.xmm0);
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// Shift right (to get low bits):
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e.vmovaps(temp, e.GetXmmConstPtr(XMMPI32));
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e.vpsubd(temp, e.xmm0);
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e.vpsrlvd(i.dest, i.src1, e.xmm0);
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// Merge:
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e.vpor(i.dest, e.xmm1);
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break;
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}
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default:
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assert_always();
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break;
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}
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}
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};
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EMITTER_OPCODE_TABLE(
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OPCODE_VECTOR_ROTATE_LEFT,
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VECTOR_ROTATE_LEFT_V128);
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// ============================================================================
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// OPCODE_BYTE_SWAP
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// ============================================================================
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@@ -5287,6 +5357,7 @@ void RegisterSequences() {
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REGISTER_EMITTER_OPCODE_TABLE(OPCODE_VECTOR_SHR);
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REGISTER_EMITTER_OPCODE_TABLE(OPCODE_VECTOR_SHA);
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REGISTER_EMITTER_OPCODE_TABLE(OPCODE_ROTATE_LEFT);
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REGISTER_EMITTER_OPCODE_TABLE(OPCODE_VECTOR_ROTATE_LEFT);
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REGISTER_EMITTER_OPCODE_TABLE(OPCODE_BYTE_SWAP);
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REGISTER_EMITTER_OPCODE_TABLE(OPCODE_CNTLZ);
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//REGISTER_EMITTER_OPCODE_TABLE(OPCODE_INSERT);
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