Commit Graph

1212 Commits

Author SHA1 Message Date
Gliniak
09be7e874a [All] Fixed multiple issues during build on Linux
- Added some fixes introduced by RodoMa92 in PR198

- Lack of AVX2 extension (should be done differently in the future)
- Disable deprecated-volatile warning
- Added missing override in posix EventInfo, ImGui notification class and XContent class
- Removed not used XAudio2.h include in XMP
- Fixed missing switch-case in XObject
- Added fugly template in native_list.h
- Fixed multiple smaller issues
2025-01-10 21:41:45 +01:00
marko1616
34da168284 [XEX] Check if header exists during XexInfoCache init 2025-01-08 11:22:26 +01:00
Gliniak
7437c020d6 [Misc] Fixed some issues during compilation process on Linux 2025-01-07 22:54:16 +01:00
Gliniak
c3586bc165 [C++] Uplift version to C++20 2024-12-26 23:42:31 +01:00
Margen67
3acf3fdcd1 Never specify /O1
Leaving it as /O2 might improve performance.
Stops this from being spammed:
cl : command line  warning D9025: overriding '/O2' with '/O1' [D:\a\xenia-canary\xenia-canary\build\glslang-spirv.vcxproj]

/Os is implied by /O1;
https://learn.microsoft.com/en-us/cpp/build/reference/o1-o2-minimize-size-maximize-speed?view=msvc-170
2024-12-13 13:01:06 -08:00
Gliniak
a295ec1bbd [Base] Removed useless path_to_utf8 conversion while using fmt
Default filesystem::path formatter was added to fmt around 2022
2024-12-13 19:04:31 +01:00
Gliniak
3318ab5d4c [3PP] Uplifted FMT version and adjusted messages 2024-12-12 20:28:11 +01:00
Gliniak
3ac98ebfba [Static Analysis] Resolved some issues mentioned in Alexandr-u report 2024-11-02 19:08:34 +01:00
EmiGITs
0712132ed0 [CPU] Added disable_context_promotion option
This disable ContextPromotionPass that causes instability in some games
2024-10-20 20:08:56 +02:00
Margen67
90259bef6a [CPU] Add note to cpu option 2024-10-16 03:40:53 -07:00
Gliniak
edc829f3e6 [CPU] Check for modification of base_address during patch application 2024-09-15 17:13:04 +02:00
Gliniak
71de56416d [Kernel] Cleanup in TU applying code.
Externally it is still applied via: ApplyTitleUpdate
But internally it is splitted into:
 - FindTitleUpdate
 - LoadTitleUpdate
 - IsPatchSignatureProper
 - ApplyTitleUpdate

Added host window with warning about TU incompatibility
2024-09-07 18:26:00 +02:00
Gliniak
616dbfe34e [XEX] Fixed issue with patch applying failure for some executables 2024-09-04 21:04:47 +02:00
Gliniak
ed843f35f8 [GPU] Added janky(?) support for register: D1MODE_V_COUNTER
Put internal_display_resolution into graphics_system

Thanks Beeanyew for initial implementation
2024-08-31 23:37:21 +02:00
Gliniak
ec267c348a [LINT] Fixed lint issues after clang-format update 2024-06-13 20:56:56 +02:00
frazier_g
c01c06d19b Make guest debugger usable 2024-05-19 18:50:43 +02:00
Gliniak
2ca752ce07 Revert "Optimized CONVERT_I64_TO_F64 with neat overflow trick"
This reverts commit 3ad80810b5.

Fixes broken statue animation is 454108CF
2024-05-09 20:00:03 +02:00
Gliniak
a966143823 [Emulator] use filesystem::file_size instead of ftell where possible 2024-03-22 11:03:34 +01:00
Gliniak
b9061e6292 [LINT] Linted files + Added lint job to CI 2024-03-12 19:19:30 +01:00
Gliniak
354d42135d [CPU] Support for const value in src1 for OPCODE_PACK 2024-02-12 18:33:03 +01:00
Gliniak
c8ca077ec4 [Codacy] Fixed some issues found by codacy.
Added skipping shaders directory in scan
2024-01-20 13:19:37 +01:00
disjtqz
275454089e [Kernel] Implement ObCreateObject 2023-10-21 17:33:07 +02:00
none
d8aa14da73 Small fixes for better cross-platform compatibility (#200)
* Add ifdef check before the Microsoft-specific movsq in memory.cc

* Added ifdef before Microsoft-specific movsq and replaced with memcpy in other cases. In memory.cc

* Update image_sha_bytes_ from 16 to 20  xex_module.h

The value 16 is less than the expected value 20, causing a buffer overflow during sha1 finalization.

* Update image_sha_bytes_ loop from 16 to 20 iterations xex_module.cc

* Update mapped_memory_posix.cc: Must resize file to map_length.

* Should not map nullptr with MAP_FIXED flag. Update memory_posix.cc.
2023-10-21 17:07:29 +02:00
disjtqz
6a08208dc8 Proper misalignment for AllocatePool, add guest object table 2023-10-14 19:29:25 +02:00
disjtqz
a7b047b2a2 Implement kernel processes 2023-10-12 22:13:40 +02:00
disjtqz
43fd396db7 implement dynamically allocateable guest to host callbacks 2023-10-11 18:37:23 +02:00
disjtqz
b5ddd30572 moved xsemaphore to xthread.d
add typed guest pointer template
add X_KSPINLOCK, rework spinlock functions.
rework irql related code, use irql on pcr instead of on XThread
add guest linked list helper functions
renamed ProcessInfoBlock to X_KPROCESS
assigned names to many kernel structure fields
2023-10-11 17:43:59 +02:00
disjtqz
fe7dc26e3f place locals on backend pages 2023-10-02 09:50:13 +02:00
disjtqz
67f16c4e31 implement more accurately inaccurate frsqrte 2023-10-02 09:47:30 +02:00
disjtqz
79465708aa implement bit-perfect vrsqrtefp 2023-10-01 11:08:17 +02:00
Gliniak
ce9a82ccf8 Merge branch 'master' of https://github.com/xenia-project/xenia into canary_experimental 2023-09-01 18:20:29 +02:00
Adrian
91f976e524 [Patcher] Plugin Loader
Added a plugin loader which can be enabled with allow_plugins in the config.
2023-08-06 21:36:49 +02:00
Gliniak
c5e6352c34 [CPU] Added constant propagation pass for: OPCODE_AND_NOT 2023-07-27 23:41:45 +03:00
Wunkolo
6ee2e3718f [x64] Add AVX512 optimizations for OPCODE_VECTOR_COMPARE_UGT(Integer)
AVX512 has native unsigned integer comparisons instructions, removing
the need to XOR the most-significant-bit with a constant in memory to
use the signed comparison instructions. These instructions only write to
a k-mask register though and need an additional call to `vpmovm2*` to
turn the mask-register into a vector-mask register.

As of Icelake:
`vpcmpu*` is all L3/T1
`vpmovm2d` is L1/T0.33
`vpmovm2{b,w}` is L3/T0.33

As of Zen4:
`vpcmpu*` is all L3/T0.50
`vpmovm2*` is all L1/T0.25
2023-05-29 14:57:09 -05:00
Wunkolo
121bf93cbe [PPC] Implement vsubcuw
Other half of #2125. I don't know of any title that utilizes this instruction, but I went ahead and implemented it for completeness.

Verified the implementation with `instr__gen_vsubcuw` from #1348. Can be grabbed with:
```
git checkout origin/gen_tests -- src\xenia\cpu\ppc\testing\*vsubcuw.s
```
2023-05-29 14:56:12 -05:00
Wunkolo
93b77fb775 [PPC] Implement vaddcuw
I don't know of any title that utilizes this instruction, but I went
ahead and implemented it for completeness.

Verified the implementation with `instr__gen_vaddcuw` from #1348. Can be
grabbed with:
```
git checkout origin/gen_tests -- src\xenia\cpu\ppc\testing\*vaddcuw.s
```
2023-05-29 14:56:00 -05:00
chss95cs@gmail.com
27c4cef1b5 Added logger flags, for selectively disabling categories of logging (cpu, apu, kernel). Need to make more log messages make use of these flags.
The "close window" keyboard hotkey (Guide-B) now toggles between loglevel -1 and the loglevel set in your config.
Added LoggerBatch class, which accumulates strings into the threads scratch buffer. This is only intended to be used for very high frequency debug logging. if it exhausts the thread buffer, it just silently stops.
Cleaned nearly 8 years of dust off of the pm4 packet disassembler code, now supports all packets that the command processor supports.
Added extremely verbose logging for gpu register writes. This is not compiled in outside of debug builds, requires LogLevel::Debug and log_guest_driven_gpu_register_written_values = true.
Added full logging of all PM4 packets in the cp. This is not compiled in outside of debug builds, requires LogLevel::Debug and disassemble_pm4.
Piggybacked an implementation of guest callstack backtraces using the stackpoints from enable_host_guest_stack_synchronization. If enable_host_guest_stack_synchronization = false, no backtraces can be obtained.
Added log_ringbuffer_kickoff_initiator_bts. when a thread updates the cp's read pointer, it dumps the backtrace of that thread
Changed the names of the gpu registers CALLBACK_ADDRESS and CALLBACK_CONTEXT to the correct names.
Added a note about CP_PROG_COUNTER
Added CP_RB_WPTR to the gpu register table
Added notes about CP_RB_CNTL and CP_RB_RPTR_ADDR. Both aren't necessary for HLE
Changed name of UNKNOWN_0E00 gpu register to TC_CNTL_STATUS. Games only seem to write 1 to it (L2 invalidate)
2023-04-16 12:42:42 -04:00
chss95cs@gmail.com
e75e0425e0 forward branch for double-clear condition in reserved store 2023-04-15 16:22:37 -04:00
chss95cs@gmail.com
7fb4b4cd41 Attempt to emulate reserved load/store more closely. can't do anything for stores of the same value that are done via a non-reserved store to a reserved location
uses a bitmap that splits up the memory space into 65k blocks per bit.  Currently is using the guest virtual address but should be using physical addresses instead.

Currently if a guest does a reserve on a location and then a reserved store to a totally different location we trigger a breakpoint. This should never happen
Also removed the NEGATED_MUL_blah operations. They weren't necessary, nothing special is needed for the negated result variants.

Added a log message for when watched physical memory has a race, it just would be nice to know when it happens and in what games.
2023-04-15 16:06:07 -04:00
chss95cs@gmail.com
356300d14c Do not check if we should show the prefetchw error message if we already have an avx error message.
mtmsrd writes the EE bit only now.
2023-04-02 14:26:01 -04:00
chss95cs@gmail.com
6ccdc4d0df setup initial value of MSR on ppc context
Fixed PrefetchW feature check
Added prefetchw check to startup AVX check, there should be no CPUs that support AVX but not PrefetchW.
Init VRSAVE to all ones.
Removed unused disable_global_lock flag.
2023-04-01 14:48:56 -04:00
Gliniak
0ec65be5ff [UI] Notification & Custom Font Support 2023-03-08 09:36:49 +01:00
Emma
4ecd1bffda Add configurable toggle to mark code segments as writable (#100) 2023-01-23 23:44:59 +01:00
Gliniak
ea1003c6bf [CPU] Check if flags pointer exists
There is specific situation in FM4 on terminating thread that runs dll
where flags pointer doesn't exist
2023-01-09 16:13:09 +01:00
Gliniak
26415cb8b1 Merge branch 'master' of https://github.com/xenia-project/xenia into canary_experimental 2022-12-31 11:19:01 +01:00
Wunkolo
e55cb737c1 [x64] Add AX512 optimization for OPCODE_SELECT(F64) 2022-12-28 14:20:20 -06:00
Wunkolo
ba75a016b4 [x64] Add AX512 optimization for OPCODE_SELECT(V128)
Uses `vpternlogd` to collapse the bitwise select operation into one
instruction. Though it needs a `vmovdqa` instruction since `vpternlogd`
reads and writes to the first argument.
2022-12-28 14:20:20 -06:00
Wunkolo
7c21b327ff [x64] Add x64_util.h
Used to help with generating instruction-specific constants.  Currently
used for the ternary-logic constants(`vpternlog*`).
2022-12-28 14:20:20 -06:00
Gliniak
eb25fe4f4a [CPU] Increase amount of possible labels used in FinalizationPass
Instead of using decimal notaation for labels let's use hexadecimal.
That will increase amount of possible combination by a lot.
2022-12-28 14:19:55 -06:00
Bo Anderson
2a77ed7246 cpu/backend/x64/x64_tracers: fix thread matching 2022-12-17 13:34:48 -05:00