Commit Graph

3 Commits

Author SHA1 Message Date
Herman S.
bc37068f90 [x64] Fix AVX-512 VECTOR_DENORMFLUSH merge-masking & FpRangeSign values
Copy src1 into dest before the masked vrangeps so that unmasked lanes
(normal/inf/NaN values) are preserved via merge-masking. Previously,
when the register allocator assigned different physical registers for
dest and src1, unmasked lanes would retain stale values from dest.

Tested with Intel SDE and AVX-512 cpu to verify.

Also shift unused FpRangeSign constants into bits [3:2] of the vrangeps
immediate, matching the Intel encoding. Only one used in the code was 0
so it was already correct by accident but using the others in the future
would produce incorrect results.
2026-03-21 15:16:59 +09:00
Wunkolo
7801d53842 [x64] Add AVX512 optimization for VECTOR_DENORMFLUSH
Use the `vptestnmd`-instruction to quickly test if the exponent bits of
each element is zero and put these results into a mask register. This
mask register can then be used to write `+0.0` or `-0.0` values
depending on the original value's sign-bit.

A masked `vrangeps` instruction is used to move zero-values into the effected
elements while preserving the sign-bit without having to touch memory.
2026-03-20 22:26:17 +01:00
Wunkolo
7c21b327ff [x64] Add x64_util.h
Used to help with generating instruction-specific constants.  Currently
used for the ternary-logic constants(`vpternlog*`).
2022-12-28 14:20:20 -06:00