Commit Graph

15 Commits

Author SHA1 Message Date
Triang3l
913e1e949c [GPU] Ownership-transfer-based RT cache, 3x3 resolution scaling
The ROV path is also disabled by default because of lower performance
2021-04-26 22:12:09 +03:00
Triang3l
9a74df491f [DXBC] dxbc.h with non-translator-specific parts 2021-01-04 16:15:50 +03:00
Triang3l
e6fa0ad139 [GPU] Dynamic r# count via shader modifications + refactoring 2020-12-19 16:14:54 +03:00
Triang3l
9a4643d0f2 [GPU] Non-ROV f24 trunc/round, host shader modifications, cache dir 2020-12-07 22:31:46 +03:00
Triang3l
bd5f77bc3b [GPU] Common resolve code based on compute shaders, swap MSAA samples 1 and 2, change ROV write rounding, random refactoring 2020-08-09 21:33:10 +03:00
Triang3l
4bb0ca0e09 [GPU] Move all xenos.h to gpu::xenos, disambiguate Dimension/TextureDimension 2020-07-11 15:54:22 +03:00
Triang3l
40e335e2a9 [D3D12] Bindless textures/samplers 2020-06-19 23:52:33 +03:00
Triang3l
5f5e281e8c [DXBC] Rewrite a comment in memexport that may be outdated 2020-03-29 19:14:25 +03:00
Triang3l
05f6b444a0 [DXBC] Move memexport to the new DXBC code and make it more straightforward 2020-03-29 19:09:58 +03:00
Triang3l
7bdf59a8c7 [DXBC] Fix totally broken instruction when memexport is used in PS 2020-03-28 00:23:02 +03:00
Triang3l
6672997108 [D3D12] ROV early Z and full rewrite, shader scalar optimizations 2019-07-11 09:31:58 +03:00
Triang3l
bc89a5822b [D3D12] Memexport: Fix red/blue swap not being in the write mask 2019-01-05 21:14:06 +03:00
Triang3l
43866092a5 [D3D12] Update some comments about numeric formats 2018-12-28 14:12:09 +03:00
Triang3l
5860a8fdc6 [D3D12] DXBC: Add a missing STAT increment to memexport 2018-12-28 08:13:35 +03:00
Triang3l
ec7667ce1b [D3D12] Broken memexport shader code 2018-12-27 20:43:17 +03:00