Commit Graph

22 Commits

Author SHA1 Message Date
Herman S.
65d42843b6 Merge remote-tracking branch 'xenia-master/master' into canary_experimental 2026-03-06 23:05:24 +09:00
Triang3l
80dad41454 [GPU/WGF] Use ByteAddressBuffer in precompiled shaders
Drivers and hardware may provide more optimal paths for untyped buffers
compared to typed.

Also, ByteAddressBuffer may be bound via a root descriptor in Direct3D 12,
greatly simplifying the binding logic.

ByteAddressBuffer also doesn't have the 128 * 2^20 element count limit that
typed and structured buffers have, and doesn't require the structure stride
to be specified at resource creation time in Direct3D 11.
2026-02-17 23:28:42 +03:00
Gliniak
419c0149c9 [Base] Post merge fixes 2025-08-15 18:06:57 +02:00
Gliniak
c4bd676c5e Merge branch 'master' of https://github.com/xenia-project/xenia into canary_experimental 2025-08-15 15:37:50 +02:00
Triang3l
b5432ab83f [Vulkan] Refactoring and fixes for VulkanProvider and related areas
Enable portability subset physical device enumeration.

Don't use Vulkan 1.1+ logical devices on Vulkan 1.0 instances due to the
VkApplicationInfo::apiVersion specification.

Make sure all extension dependencies are enabled when creating a device.

Prefer exposing feature support over extension support via the device
interface to avoid causing confusion with regard to promoted extensions
(especially those that required some features as extensions, but had those
features made optional when they were promoted).

Allow creating presentation-only devices, not demanding any optional
features beyond the basic Vulkan 1.0, for use cases such as internal tools
or CPU rendering.

Require the independentBlend feature for GPU emulation as working around is
complicated, while support is almost ubiquitous.

Move the graphics system initialization fatal error message to xenia_main
after attempting to initialize all implementations, for automatic fallback
to other implementations in the future.

Log Vulkan driver info.

Improve Vulkan debug message logging, enabled by default.

Refactor code, with simplified logic for enabling extensions and layers.
2025-08-14 23:44:21 +03:00
Xphalnos
7479ccc292 [Misc] Fix Some Warnings on Clang Build with Windows + Adding constexpr 2025-03-27 17:52:18 +01:00
chss95cs@gmail.com
eb8154908c atomic cas use prefetchw if available
remove useless memorybarrier
remove double membarrier in wait pm4 cmd
add int64 cvar
use int64 cvar for x64 feature mask
Rework some functions that were frontend bound according to vtune placing some of their code in different noinline functions, profiling after indicating l1 cache misses decreased and perf of func increased
remove long vpinsrd dep chain code for conversion.h, instead do normal load+bswap or movbe if avail
Much faster entry table via split_map, code size could be improved though
GetResolveInfo was very large and had impact on icache, mark callees as noinline + msvc pragma optimize small
use log2 shifts instead of integer divides in memory
minor optimizations in PhysicalHeap::EnableAccessCallbacks, the majority of time in the function is spent looping, NOT calling Protect! Someone should optimize this function and rework the algo completely
remove wonky scheduling log message, it was spammy and unhelpful
lock count was unnecessary for criticalsection mutex, criticalsection is already a recursive mutex
brief notes i gotta run
2022-09-17 04:04:53 -07:00
chss95cs@gmail.com
7cc364dcb8 squash reallocs in command buffers by using large prealloced buffer, directly use virtual memory with it so os allocs on demand
mark raw clock functions as noinline, the way msvc was inlining them and ordering the branches meant that rdtsc would often be speculatively executed
add alternative clock impl for win, instead of using queryperformancecounter we grab systemtime from kusershared. it does not have the same precision as queryperformancecounter, we only have 100 nanosecond precision, but we round to milliseconds so it never made sense to use the performance counter in the first place
stubbed out the "guest clock mutex"... (the entirety of clock.cc needs a rewrite)
added some helpers for minf/maxf without the nan handling behavior
2022-08-14 13:42:08 -07:00
Triang3l
913e1e949c [GPU] Ownership-transfer-based RT cache, 3x3 resolution scaling
The ROV path is also disabled by default because of lower performance
2021-04-26 22:12:09 +03:00
Triang3l
9349cf4ff4 [D3D12] Fix custom sample position reset 2020-12-08 22:43:15 +03:00
Triang3l
6b988d43c7 [D3D12] Cleanup: pipeline state -> pipeline, other things 2020-11-14 16:43:18 +03:00
Triang3l
75bf2d3c7d [D3D12] Minor deferred command list refactoring 2020-10-04 21:53:52 +03:00
Triang3l
6cb8f0aab4 [D3D12] Nicer DeferredCommandList uintmax_t alignment 2020-10-03 14:12:30 +03:00
Triang3l
1e9ee8f43b [D3D12] Change most subsystem pointers to references 2020-08-30 22:07:35 +03:00
Triang3l
79413345af [C++17] static constexpr variables are implicitly inline now 2020-07-11 16:44:57 +03:00
Triang3l
d26f84b36b [D3D12] Untile whole mip tail to make alignment assumptions later, other mip fixes 2020-06-23 23:49:42 +03:00
Triang3l
cde092ece1 [D3D12] Persistent shader and PSO storage 2020-03-21 19:22:19 +03:00
Triang3l
c499229455 [GPU] Store an EDRAM snapshot in traces 2019-11-04 17:30:20 +03:00
Triang3l
6672997108 [D3D12] ROV early Z and full rewrite, shader scalar optimizations 2019-07-11 09:31:58 +03:00
Triang3l
890228b6f3 [D3D12] Prototype multithreaded PSO creation 2019-01-04 00:30:11 +03:00
Triang3l
364cae6cc8 [D3D12] Use deferred command list 2019-01-03 15:08:49 +03:00
Triang3l
f0c662fa1e [D3D12] Deferred command list class 2019-01-02 23:46:24 +03:00