Gliniak
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67a0ccb7c0
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[CPU] Unified assertions for unimplemented opcodes
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2022-03-23 11:41:49 -05:00 |
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Wunkolo
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0fdb855a11
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[JIT, x64] Add and implement OPCODE_AND_NOT
Verified the x64 implementation using `xenia-cpu-ppc-tests`.
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2022-01-04 16:16:49 -06:00 |
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Rados??aw Gli??ski
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404aa82147
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[CPU] Implemented instructions: rldclx, rldcrx
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2020-02-09 16:48:50 -06:00 |
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Triang3l
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ae6fd98c3c
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[CPU] Ignore upper bits of shift amount in srdx/srwx
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2019-01-08 01:39:21 +03:00 |
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DrChat
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ec501a32c6
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[JIT] Apply the same ZeroExtend/Truncate to rlwimix and rlwnmx
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2018-02-14 22:05:54 -06:00 |
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DrChat
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02b5a07bc9
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[JIT] rlwinmx: Use Truncate/ZeroExtend instead of And 0xFFFFFFFF
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2018-02-14 13:50:57 -06:00 |
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Ben Vanik
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cbc74c92f4
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Fixing CR update for divwu/divdu/mulhwu.
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2015-12-30 10:04:57 -08:00 |
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Ben Vanik
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74d71f7a4a
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Fixing the rlw* instructions.
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2015-12-30 09:02:29 -08:00 |
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Ben Vanik
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321e2663ef
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Fixing mullw.
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2015-12-29 20:42:20 -08:00 |
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Ben Vanik
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cd938be678
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Removing all uses of the old PPC tables besides disasm.
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2015-12-28 10:08:38 -08:00 |
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Ben Vanik
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15816327b4
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Renaming xe::cpu::frontend to xe::cpu::ppc.
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2015-12-14 21:17:55 -08:00 |
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