Commit Graph

26 Commits

Author SHA1 Message Date
Gliniak
c4bd676c5e Merge branch 'master' of https://github.com/xenia-project/xenia into canary_experimental 2025-08-15 15:37:50 +02:00
Triang3l
a06be03f1b [GPU] Cleanup definitions of some registers
VS/PS_NUM_REG is 6-bit on Adreno 200, and games aren't seen using the
bit 7 to indicate that no GPRs are used. It's not clear why Freedreno
configures it this way.

Some texture fetch fields were deprecated or moved during the development
of the Xenos, reflect that in the comments.

Add definitions of the registers configuring the conversion of vertex
positions to fixed-point. Although there isn't much that can be done with
it when emulating using PC GPU APIs, there are some places in Xenia that
wrongly (though sometimes deliberately, for results closer to the behavior
of the host GPU) assume that the conversion works like in Direct3D 10+,
however the Xenos supports only up to 4 subpixel bits rather than 8. The
effects of this difference are largely negligible, though.

Also add more detailed info about register references and differences from
other ATI/AMD GPUs for potential future contributors.
2025-08-06 13:21:19 +03:00
Xphalnos
5d5eb03127 [GPU] Adding Registers from Xenon 2025-04-17 13:18:52 +02:00
Gliniak
ed843f35f8 [GPU] Added janky(?) support for register: D1MODE_V_COUNTER
Put internal_display_resolution into graphics_system

Thanks Beeanyew for initial implementation
2024-08-31 23:37:21 +02:00
Gliniak
b9061e6292 [LINT] Linted files + Added lint job to CI 2024-03-12 19:19:30 +01:00
disjtqz
911055c44f add writeback base/size and xps base/size registers, EVENT_WRITE_SHD check 2023-09-21 21:44:23 +02:00
chss95cs@gmail.com
2fa2f1a78c Add more wrapper functions to ppc_context_t in kernel, want to switch…
… over to referencing state through ppc_context as much as possible, it'll make implementing things like kernel processes much easier in the future

Move forward definitions of kernel types into kernel_fwd.h

Stub implementation of  XamLoaderGetMediaInfoEx
Partially implement XamSetDashContext
implement XamGetDashContext
Stub implementation of XamUserIsUnsafeProgrammingAllowed
Stub implementation of XamUserGetSubscriptionType
Expanded the supported object types for ObReferenceObjectByHandle and wrapped the logic for encoding the type in a constexpr function
ObReferenceObjectByName was taking lpstring_t for first param, but the function actually takes X_ANSI_STRING ptr

NtReleaseMutant actually does not return anything from KeReleaseMutant, it just checks the handle and returns whether it was invalid.

Changed the raise/lower irql functions to just set the irql on the pcr instead of setting it on field of Processor, processor is a shared object and irql is per-thread

Semi-stub implementation of KeGetImagePageTableEntry. I locked at it in the HV and got it so the values are in the same range the HV returns + actually reflect the page & memory range, but i doubt its equal to the values the hv returns on real hw. Used by modern dashboards, don't know for what.
Log error message for ObDereferenceObject w/ null ptr.

Allocate a special fixed page that dashboards reference, currently don't know what the data on that page is supposed to be.
Add current_irql field to X_KPCR
Added Device object member of XObject::Type enum
Added some notes about other gpu registers, found a table of register names and indices in xam
2023-04-23 10:39:52 -04:00
chss95cs@gmail.com
27c4cef1b5 Added logger flags, for selectively disabling categories of logging (cpu, apu, kernel). Need to make more log messages make use of these flags.
The "close window" keyboard hotkey (Guide-B) now toggles between loglevel -1 and the loglevel set in your config.
Added LoggerBatch class, which accumulates strings into the threads scratch buffer. This is only intended to be used for very high frequency debug logging. if it exhausts the thread buffer, it just silently stops.
Cleaned nearly 8 years of dust off of the pm4 packet disassembler code, now supports all packets that the command processor supports.
Added extremely verbose logging for gpu register writes. This is not compiled in outside of debug builds, requires LogLevel::Debug and log_guest_driven_gpu_register_written_values = true.
Added full logging of all PM4 packets in the cp. This is not compiled in outside of debug builds, requires LogLevel::Debug and disassemble_pm4.
Piggybacked an implementation of guest callstack backtraces using the stackpoints from enable_host_guest_stack_synchronization. If enable_host_guest_stack_synchronization = false, no backtraces can be obtained.
Added log_ringbuffer_kickoff_initiator_bts. when a thread updates the cp's read pointer, it dumps the backtrace of that thread
Changed the names of the gpu registers CALLBACK_ADDRESS and CALLBACK_CONTEXT to the correct names.
Added a note about CP_PROG_COUNTER
Added CP_RB_WPTR to the gpu register table
Added notes about CP_RB_CNTL and CP_RB_RPTR_ADDR. Both aren't necessary for HLE
Changed name of UNKNOWN_0E00 gpu register to TC_CNTL_STATUS. Games only seem to write 1 to it (L2 invalidate)
2023-04-16 12:42:42 -04:00
Triang3l
c794d0d538 [GPU] DC_LUT_RW_INDEX/WRITE_EN_MASK + gamma ramp and registers in traces 2022-05-05 13:10:29 +03:00
Triang3l
c4a5048e62 [GPU] More specific note about slope-scaled depth bias 2021-06-06 18:33:06 +03:00
Triang3l
dce6938827 [D3D12] ROV sample depth via ddxy(z), DSV depth bias cleanup 2021-06-06 18:27:43 +03:00
Triang3l
538aa91015 [GPU] Primitive processor with Vulkan 1.0 base cases, 24-bit indices and clamping 2021-06-04 23:57:46 +03:00
Joel Linn
923678dad7 [GPU] Add performance counter registers.
v3: Document registers referenced by D3D in `gpu.md`.
2020-11-21 21:55:52 +03:00
Joel Linn
f6dc9ad517 [GPU] Skip viz-query geometry (if marked).
Document research about viz queries.

v2: Remove viz status unions and move comments to register definitions.
    Add contributors to TODOs.

v3: Comment out unused variables.
    Add TODO for correctly dropping draw calls with memexport.
    Register comment formatting.
2020-11-21 21:55:52 +03:00
Triang3l
90b772a330 [GPU] Set VGT_DRAW_INITIATOR and use major mode from it 2020-02-24 23:27:25 +03:00
Triang3l
a9ed73bdd1 [GPU] Remove most hardcoded register/instruction layouts from common and D3D12 code 2019-10-20 19:40:37 +03:00
gibbed
8a65dbd024 [GPU] Make some gaps in the register table more obvious. 2018-05-21 22:56:05 -05:00
DrChat
c7ffec3260 [GPU] Add unknown registers E00/E40 to register file 2018-02-09 20:57:51 -06:00
DrChat
121a2d655a Vulkan: Properly support depth writes (or blit depth images if able) 2017-09-01 18:32:55 -05:00
Thomas Mccaffery
fb51148b03 Added GPU Register Definition
Added 0x1924 = 0x6490 according to this referenced here https://www.x.org/docs/AMD/old/RRG-216M56-03oOEM.pdf as DC_LUT_PWL_DATA.
2017-06-12 02:48:51 -04:00
Dr. Chat
9dc740dcc0 GraphicsSystem: Properly support register file reads/writes, and fill in some unknown registers 2017-06-11 13:00:31 -05:00
Parker Lamb
8ae737aaa5 Added GPU register definitions. 2017-06-06 21:45:41 -05:00
Dr. Chat
b31705c543 Registers 0x5000-0x5002 2016-06-25 10:26:39 -05:00
Dr. Chat
70b2d09834 PA_CL_UCP_* registers 2016-06-24 14:44:51 -05:00
Ben Vanik
41174b0e64 Hacktastic GPU trace viewer; textures, shaders, state, etc. 2015-03-01 12:26:11 -08:00
Ben Vanik
577ab0a4f1 Main window, empty GPU files. 2014-12-31 19:26:53 -08:00