test_vcsxwfp128_1: # Convert 0 to float #_ REGISTER_IN v0 [00000000, 00000000, 00000000, 00000000] vcsxwfp128 v3, v0, 0 blr #_ REGISTER_OUT v0 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] test_vcsxwfp128_2: # Convert 1 to float (1.0) #_ REGISTER_IN v0 [00000001, 00000001, 00000001, 00000001] vcsxwfp128 v3, v0, 0 blr #_ REGISTER_OUT v0 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [3F800000, 3F800000, 3F800000, 3F800000] test_vcsxwfp128_3: # Convert -1 to float (-1.0) #_ REGISTER_IN v0 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vcsxwfp128 v3, v0, 0 blr #_ REGISTER_OUT v0 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [BF800000, BF800000, BF800000, BF800000] test_vcsxwfp128_4: # Convert 2 to float (2.0) #_ REGISTER_IN v0 [00000002, 00000002, 00000002, 00000002] vcsxwfp128 v3, v0, 0 blr #_ REGISTER_OUT v0 [00000002, 00000002, 00000002, 00000002] #_ REGISTER_OUT v3 [40000000, 40000000, 40000000, 40000000] test_vcsxwfp128_5: # Convert 100 to float (100.0) #_ REGISTER_IN v0 [00000064, 00000064, 00000064, 00000064] vcsxwfp128 v3, v0, 0 blr #_ REGISTER_OUT v0 [00000064, 00000064, 00000064, 00000064] #_ REGISTER_OUT v3 [42C80000, 42C80000, 42C80000, 42C80000] test_vcsxwfp128_6: # Convert -100 to float (-100.0) #_ REGISTER_IN v0 [FFFFFF9C, FFFFFF9C, FFFFFF9C, FFFFFF9C] vcsxwfp128 v3, v0, 0 blr #_ REGISTER_OUT v0 [FFFFFF9C, FFFFFF9C, FFFFFF9C, FFFFFF9C] #_ REGISTER_OUT v3 [C2C80000, C2C80000, C2C80000, C2C80000] test_vcsxwfp128_7: # Convert max positive signed int (0x7FFFFFFF) #_ REGISTER_IN v0 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] vcsxwfp128 v3, v0, 0 blr #_ REGISTER_OUT v0 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] #_ REGISTER_OUT v3 [4F000000, 4F000000, 4F000000, 4F000000] test_vcsxwfp128_8: # Convert min negative signed int (0x80000000) #_ REGISTER_IN v0 [80000000, 80000000, 80000000, 80000000] vcsxwfp128 v3, v0, 0 blr #_ REGISTER_OUT v0 [80000000, 80000000, 80000000, 80000000] #_ REGISTER_OUT v3 [CF000000, CF000000, CF000000, CF000000]