test_vaddsws_1_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] test_vaddsws_2_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000] test_vaddsws_3_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F] test_vaddsws_4_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000D000D, 000D000D, 000D000D, 000D000D] test_vaddsws_5_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [00112233, 44556677, 8899AABB, CCDDEEFF] test_vaddsws_6_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] test_vaddsws_7_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04040404, 04040404, 04040404, 04040404] test_vaddsws_8_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07070707, 07070707, 07070707, 07070707] test_vaddsws_9_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08080808, 08080808, 08080808, 08080808] test_vaddsws_10_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12121212, 12121212, 12121212, 12121212] test_vaddsws_11_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [12345678, 87654321, 11223344, 55667788] test_vaddsws_12_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] test_vaddsws_13_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [41200000, C1200000, 41700000, C1700000] test_vaddsws_14_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] test_vaddsws_15_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] test_vaddsws_16_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF800000, BFC00000, BF8CCCCD, BFF33333] test_vaddsws_17_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C1200000, 41A00000, C1A00000, 41F00000] test_vaddsws_18_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] test_vaddsws_19_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] test_vaddsws_20_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] test_vaddsws_21_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] test_vaddsws_22_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] test_vaddsws_23_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] test_vaddsws_24_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] test_vaddsws_25_GEN: #_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] test_vaddsws_26_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] test_vaddsws_27_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [00010000, FFFF0001, 00000001, FFFF0001] test_vaddsws_28_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [00010204, 04050608, 08090A0C, 0C0D0E10] test_vaddsws_29_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000D000E, 000D000E, 000D000E, 000D000E] test_vaddsws_30_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [00112234, 44556678, 8899AABC, CCDDEF00] test_vaddsws_31_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [00FFFF01, 0000FF01, FF000100, FFFF0100] test_vaddsws_32_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04040405, 04040405, 04040405, 04040405] test_vaddsws_33_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07070708, 07070708, 07070708, 07070708] test_vaddsws_34_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08080809, 08080809, 08080809, 08080809] test_vaddsws_35_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12121213, 12121213, 12121213, 12121213] test_vaddsws_36_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [12345679, 87654322, 11223345, 55667789] test_vaddsws_37_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F800001, 3FC00001, 3F8CCCCE, 3FF33334] test_vaddsws_38_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [41200001, C1200001, 41700001, C1700001] test_vaddsws_39_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F800204, 04050608, 7F800A0C, 0C0D0E10] test_vaddsws_40_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80081011, 808F0001, 7FFFFFFF, 90000000] test_vaddsws_41_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF800001, BFC00001, BF8CCCCE, BFF33334] test_vaddsws_42_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C1200001, 41A00001, C1A00001, 41F00001] test_vaddsws_43_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCDCDCE, CDCDCDCE, CDCDCDCE, 04010204] test_vaddsws_44_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8F9FAFC, FCFDFF00, 00010204, 04050608] test_vaddsws_45_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FEFEFEFF, FEFEFEFF, FEFEFEFF, FEFEFEFF] test_vaddsws_46_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FFFCFFFE, FFFF0000, 00000002, 00020004] test_vaddsws_47_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FFFDFF7F, 00020082, FFFCFF7E, 00030083] test_vaddsws_48_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [FFFF0102, 70710000, 00000000, 00000001] test_vaddsws_49_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [FFFFFF81, 00000080, FFFEFF80, 00010081] test_vaddsws_50_GEN: #_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] test_vaddsws_51_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000] test_vaddsws_52_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [00010000, FFFF0001, 00000001, FFFF0001] test_vaddsws_53_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [00020202, 04040607, 08090A0B, 0C0C0E0F] test_vaddsws_54_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000E000C, 000C000D, 000D000D, 000C000D] test_vaddsws_55_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [00122232, 44546677, 8899AABB, CCDCEEFF] test_vaddsws_56_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [0100FEFF, FFFFFF00, FF0000FF, FFFE00FF] test_vaddsws_57_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04050403, 04030404, 04040404, 04030404] test_vaddsws_58_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07080706, 07060707, 07070707, 07060707] test_vaddsws_59_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08090807, 08070808, 08080808, 08070808] test_vaddsws_60_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12131211, 12111212, 12121212, 12111212] test_vaddsws_61_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [12355677, 87644321, 11223344, 55657788] test_vaddsws_62_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F80FFFF, 3FBF0000, 3F8CCCCD, 3FF23333] test_vaddsws_63_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [4120FFFF, C11F0000, 41700000, C16F0000] test_vaddsws_64_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F810202, 04040607, 7F800A0B, 0C0C0E0F] test_vaddsws_65_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [8009100F, 808E0000, 7FFFFFFF, 8FFEFFFF] test_vaddsws_66_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF80FFFF, BFBF0000, BF8CCCCD, BFF23333] test_vaddsws_67_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C120FFFF, 419F0000, C1A00000, 41EF0000] test_vaddsws_68_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCECDCC, CDCCCDCD, CDCDCDCD, 04000203] test_vaddsws_69_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8FAFAFA, FCFCFEFF, 00010203, 04040607] test_vaddsws_70_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FEFFFEFD, FEFDFEFE, FEFEFEFE, FEFDFEFE] test_vaddsws_71_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FFFDFFFC, FFFDFFFF, 00000001, 00010003] test_vaddsws_72_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FFFEFF7D, 00010081, FFFCFF7D, 00020082] test_vaddsws_73_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [00000100, 706FFFFF, FFFFFFFF, FFFF0000] test_vaddsws_74_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [0000FF7F, FFFF007F, FFFEFF7F, 00000080] test_vaddsws_75_GEN: #_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [0000FFFE, FFFEFFFF, FFFFFFFF, FFFEFFFF] test_vaddsws_76_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [00010203, 04050607, 08090A0B, 0C0D0E0F] test_vaddsws_77_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [00010204, 04050608, 08090A0C, 0C0D0E10] test_vaddsws_78_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [00020202, 04040607, 08090A0B, 0C0C0E0F] test_vaddsws_79_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000E0210, 04120614, 08160A18, 0C1A0E1C] test_vaddsws_80_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [00122436, 485A6C7E, 90A2B4C6, D8EAFD0E] test_vaddsws_81_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [01010103, 04060507, 07090B0A, 0C0C0F0E] test_vaddsws_82_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04050607, 08090A0B, 0C0D0E0F, 10111213] test_vaddsws_83_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [0708090A, 0B0C0D0E, 0F101112, 13141516] test_vaddsws_84_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08090A0B, 0C0D0E0F, 10111213, 14151617] test_vaddsws_85_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12131415, 16171819, 1A1B1C1D, 1E1F2021] test_vaddsws_86_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [1235587B, 8B6A4928, 192B3D4F, 61738597] test_vaddsws_87_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F810203, 43C50607, 4795D6D8, 4C004142] test_vaddsws_88_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [41210203, C5250607, 49790A0B, CD7D0E0F] test_vaddsws_89_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F810406, 080A0C0E, 7FFFFFFF, 181A1C1E] test_vaddsws_90_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80091213, 84940607, 7FFFFFFF, 9C0D0E0E] test_vaddsws_91_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF810203, C3C50607, C795D6D8, CC004142] test_vaddsws_92_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C1210203, 45A50607, C9A90A0B, 4DFD0E0F] test_vaddsws_93_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCECFD0, D1D2D3D4, D5D6D7D8, 100E1012] test_vaddsws_94_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8FAFCFE, 01030506, 080A0C0E, 10121416] test_vaddsws_95_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FF000101, 03040505, 07080909, 0B0C0D0D] test_vaddsws_96_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FFFE0200, 04040606, 08090A0C, 0C0F0E12] test_vaddsws_97_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FFFF0181, 04070688, 08060988, 0C100E91] test_vaddsws_98_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [00000304, 74760606, 08090A0A, 0C0D0E0F] test_vaddsws_99_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [00010183, 04050686, 0808098A, 0C0E0E8F] test_vaddsws_100_GEN: #_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [00010202, 04050606, 08090A0A, 0C0D0E0E] test_vaddsws_101_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [000D000D, 000D000D, 000D000D, 000D000D] test_vaddsws_102_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [000D000E, 000D000E, 000D000E, 000D000E] test_vaddsws_103_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [000E000C, 000C000D, 000D000D, 000C000D] test_vaddsws_104_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [000E0210, 04120614, 08160A18, 0C1A0E1C] test_vaddsws_105_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [001E2240, 44626684, 88A6AAC8, CCEAEF0C] test_vaddsws_106_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [010CFF0D, 000DFF0D, FF0D010C, 000C010C] test_vaddsws_107_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04110411, 04110411, 04110411, 04110411] test_vaddsws_108_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07140714, 07140714, 07140714, 07140714] test_vaddsws_109_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08150815, 08150815, 08150815, 08150815] test_vaddsws_110_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [121F121F, 121F121F, 121F121F, 121F121F] test_vaddsws_111_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [12415685, 8772432E, 112F3351, 55737795] test_vaddsws_112_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F8D000D, 3FCD000D, 3F99CCDA, 40003340] test_vaddsws_113_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [412D000D, C12D000D, 417D000D, C17D000D] test_vaddsws_114_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F8D0210, 04120614, 7F8D0A18, 0C1A0E1C] test_vaddsws_115_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [8015101D, 809C000D, 7FFFFFFF, 900D000C] test_vaddsws_116_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF8D000D, BFCD000D, BF99CCDA, C0003340] test_vaddsws_117_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C12D000D, 41AD000D, C1AD000D, 41FD000D] test_vaddsws_118_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDDACDDA, CDDACDDA, CDDACDDA, 040E0210] test_vaddsws_119_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F906FB08, FD0AFF0C, 000E0210, 04120614] test_vaddsws_120_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FF0BFF0B, FF0BFF0B, FF0BFF0B, FF0BFF0B] test_vaddsws_121_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [000A000A, 000C000C, 000D000E, 000F0010] test_vaddsws_122_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [000AFF8B, 000F008E, 0009FF8A, 0010008F] test_vaddsws_123_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [000C010E, 707E000C, 000D000C, 000D000D] test_vaddsws_124_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [000CFF8D, 000D008C, 000BFF8C, 000E008D] test_vaddsws_125_GEN: #_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [000D000C, 000D000C, 000D000C, 000D000C] test_vaddsws_126_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [00112233, 44556677, 8899AABB, CCDDEEFF] test_vaddsws_127_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [00112234, 44556678, 8899AABC, CCDDEF00] test_vaddsws_128_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [00122232, 44546677, 8899AABB, CCDCEEFF] test_vaddsws_129_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [00122436, 485A6C7E, 90A2B4C6, D8EAFD0E] test_vaddsws_130_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [001E2240, 44626684, 88A6AAC8, CCEAEF0C] test_vaddsws_131_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [01112133, 44566577, 8799ABBA, CCDCEFFE] test_vaddsws_132_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04152637, 48596A7B, 8C9DAEBF, D0E1F303] test_vaddsws_133_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [0718293A, 4B5C6D7E, 8FA0B1C2, D3E4F606] test_vaddsws_134_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08192A3B, 4C5D6E7F, 90A1B2C3, D4E5F707] test_vaddsws_135_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12233445, 56677889, 9AABBCCD, DEF00111] test_vaddsws_136_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [124578AB, CBBAA998, 99BBDDFF, 22446687] test_vaddsws_137_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F912233, 7FFFFFFF, C8267788, 0CD12232] test_vaddsws_138_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [41312233, 05756677, CA09AABB, 8E4DEEFF] test_vaddsws_139_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F912436, 485A6C7E, 0819B4C6, D8EAFD0E] test_vaddsws_140_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80193243, C4E46677, 0899AABA, 80000000] test_vaddsws_141_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF912233, 04156677, 80000000, 8CD12232] test_vaddsws_142_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C1312233, 7FFFFFFF, 80000000, 0ECDEEFF] test_vaddsws_143_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDDEF000, 12233444, 80000000, D0DEF102] test_vaddsws_144_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F90B1D2E, 41536576, 889AACBE, D0E2F506] test_vaddsws_145_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FF102131, 43546575, 8798A9B9, CBDCEDFD] test_vaddsws_146_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [000E2230, 44546676, 8899AABC, CCDFEF02] test_vaddsws_147_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [000F21B1, 445766F8, 8896AA38, CCE0EF81] test_vaddsws_148_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [00102334, 7FFFFFFF, 8899AABA, CCDDEEFF] test_vaddsws_149_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [001121B3, 445566F6, 8898AA3A, CCDEEF7F] test_vaddsws_150_GEN: #_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [00112232, 44556676, 8899AABA, CCDDEEFE] test_vaddsws_151_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] test_vaddsws_152_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [00FFFF01, 0000FF01, FF000100, FFFF0100] test_vaddsws_153_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [0100FEFF, FFFFFF00, FF0000FF, FFFE00FF] test_vaddsws_154_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [01010103, 04060507, 07090B0A, 0C0C0F0E] test_vaddsws_155_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [010CFF0D, 000DFF0D, FF0D010C, 000C010C] test_vaddsws_156_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [01112133, 44566577, 8799ABBA, CCDCEFFE] test_vaddsws_157_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [05040304, 04050304, 03040503, 04030503] test_vaddsws_158_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [08070607, 07080607, 06070806, 07060806] test_vaddsws_159_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [09080708, 08090708, 07080907, 08070907] test_vaddsws_160_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [13121112, 12131112, 11121311, 12111311] test_vaddsws_161_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [13345578, 87664221, 10223443, 55657887] test_vaddsws_162_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [407FFF00, 3FC0FF00, 3E8CCDCC, 3FF23432] test_vaddsws_163_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [421FFF00, C120FF00, 407000FF, C16F00FF] test_vaddsws_164_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7FFFFFFF, 04060507, 7E800B0A, 0C0C0F0E] test_vaddsws_165_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [81080F10, 808FFF00, 7F0000FE, 8FFF00FE] test_vaddsws_166_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [C07FFF00, BFC0FF00, BE8CCDCC, BFF23432] test_vaddsws_167_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C21FFF00, 41A0FF00, C0A000FF, 41EF00FF] test_vaddsws_168_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CECDCCCD, CDCECCCD, CCCDCECC, 04000302] test_vaddsws_169_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F9F9F9FB, FCFEFDFF, FF010302, 04040706] test_vaddsws_170_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FFFEFDFE, FEFFFDFE, FDFEFFFD, FEFDFFFD] test_vaddsws_171_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [00FCFEFD, FFFFFEFF, FF000100, 00010102] test_vaddsws_172_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [00FDFE7E, 0002FF81, FEFD007C, 00020181] test_vaddsws_173_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [00FF0001, 7071FEFF, FF0000FE, FFFF00FF] test_vaddsws_174_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [00FFFE80, 0000FF7F, FEFF007E, 0000017F] test_vaddsws_175_GEN: #_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [00FFFEFF, 0000FEFF, FF0000FE, FFFF00FE] test_vaddsws_176_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [04040404, 04040404, 04040404, 04040404] test_vaddsws_177_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [04040405, 04040405, 04040405, 04040405] test_vaddsws_178_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [04050403, 04030404, 04040404, 04030404] test_vaddsws_179_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [04050607, 08090A0B, 0C0D0E0F, 10111213] test_vaddsws_180_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [04110411, 04110411, 04110411, 04110411] test_vaddsws_181_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [04152637, 48596A7B, 8C9DAEBF, D0E1F303] test_vaddsws_182_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [05040304, 04050304, 03040503, 04030503] test_vaddsws_183_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [0B0B0B0B, 0B0B0B0B, 0B0B0B0B, 0B0B0B0B] test_vaddsws_184_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [0C0C0C0C, 0C0C0C0C, 0C0C0C0C, 0C0C0C0C] test_vaddsws_185_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [16161616, 16161616, 16161616, 16161616] test_vaddsws_186_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [16385A7C, 8B694725, 15263748, 596A7B8C] test_vaddsws_187_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [43840404, 43C40404, 4390D0D1, 43F73737] test_vaddsws_188_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [45240404, C5240404, 45740404, C5740404] test_vaddsws_189_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7FFFFFFF, 08090A0B, 7FFFFFFF, 10111213] test_vaddsws_190_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [840C1414, 84930404, 7FFFFFFF, 94040403] test_vaddsws_191_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [C3840404, C3C40404, C390D0D1, C3F73737] test_vaddsws_192_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C5240404, 45A40404, C5A40404, 45F40404] test_vaddsws_193_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [D1D1D1D1, D1D1D1D1, D1D1D1D1, 08050607] test_vaddsws_194_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [FCFDFEFF, 01020303, 04050607, 08090A0B] test_vaddsws_195_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [03030302, 03030302, 03030302, 03030302] test_vaddsws_196_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [04010401, 04030403, 04040405, 04060407] test_vaddsws_197_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [04020382, 04060485, 04010381, 04070486] test_vaddsws_198_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [04030505, 74750403, 04040403, 04040404] test_vaddsws_199_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [04040384, 04040483, 04030383, 04050484] test_vaddsws_200_GEN: #_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [04040403, 04040403, 04040403, 04040403] test_vaddsws_201_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [07070707, 07070707, 07070707, 07070707] test_vaddsws_202_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [07070708, 07070708, 07070708, 07070708] test_vaddsws_203_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [07080706, 07060707, 07070707, 07060707] test_vaddsws_204_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [0708090A, 0B0C0D0E, 0F101112, 13141516] test_vaddsws_205_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [07140714, 07140714, 07140714, 07140714] test_vaddsws_206_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [0718293A, 4B5C6D7E, 8FA0B1C2, D3E4F606] test_vaddsws_207_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [08070607, 07080607, 06070806, 07060806] test_vaddsws_208_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [0B0B0B0B, 0B0B0B0B, 0B0B0B0B, 0B0B0B0B] test_vaddsws_209_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [0F0F0F0F, 0F0F0F0F, 0F0F0F0F, 0F0F0F0F] test_vaddsws_210_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [19191919, 19191919, 19191919, 19191919] test_vaddsws_211_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [193B5D7F, 8E6C4A28, 18293A4B, 5C6D7E8F] test_vaddsws_212_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [46870707, 46C70707, 4693D3D4, 46FA3A3A] test_vaddsws_213_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [48270707, C8270707, 48770707, C8770707] test_vaddsws_214_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7FFFFFFF, 0B0C0D0E, 7FFFFFFF, 13141516] test_vaddsws_215_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [870F1717, 87960707, 7FFFFFFF, 97070706] test_vaddsws_216_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [C6870707, C6C70707, C693D3D4, C6FA3A3A] test_vaddsws_217_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C8270707, 48A70707, C8A70707, 48F70707] test_vaddsws_218_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [D4D4D4D4, D4D4D4D4, D4D4D4D4, 0B08090A] test_vaddsws_219_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [00010202, 04050606, 0708090A, 0B0C0D0E] test_vaddsws_220_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [06060605, 06060605, 06060605, 06060605] test_vaddsws_221_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [07040704, 07060706, 07070708, 0709070A] test_vaddsws_222_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [07050685, 07090788, 07040684, 070A0789] test_vaddsws_223_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [07060808, 77780706, 07070706, 07070707] test_vaddsws_224_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [07070687, 07070786, 07060686, 07080787] test_vaddsws_225_GEN: #_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [07070706, 07070706, 07070706, 07070706] test_vaddsws_226_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [08080808, 08080808, 08080808, 08080808] test_vaddsws_227_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [08080809, 08080809, 08080809, 08080809] test_vaddsws_228_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [08090807, 08070808, 08080808, 08070808] test_vaddsws_229_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [08090A0B, 0C0D0E0F, 10111213, 14151617] test_vaddsws_230_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [08150815, 08150815, 08150815, 08150815] test_vaddsws_231_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [08192A3B, 4C5D6E7F, 90A1B2C3, D4E5F707] test_vaddsws_232_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [09080708, 08090708, 07080907, 08070907] test_vaddsws_233_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [0C0C0C0C, 0C0C0C0C, 0C0C0C0C, 0C0C0C0C] test_vaddsws_234_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [0F0F0F0F, 0F0F0F0F, 0F0F0F0F, 0F0F0F0F] test_vaddsws_235_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [1A1A1A1A, 1A1A1A1A, 1A1A1A1A, 1A1A1A1A] test_vaddsws_236_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [1A3C5E80, 8F6D4B29, 192A3B4C, 5D6E7F90] test_vaddsws_237_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [47880808, 47C80808, 4794D4D5, 47FB3B3B] test_vaddsws_238_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [49280808, C9280808, 49780808, C9780808] test_vaddsws_239_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7FFFFFFF, 0C0D0E0F, 7FFFFFFF, 14151617] test_vaddsws_240_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [88101818, 88970808, 7FFFFFFF, 98080807] test_vaddsws_241_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [C7880808, C7C80808, C794D4D5, C7FB3B3B] test_vaddsws_242_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C9280808, 49A80808, C9A80808, 49F80808] test_vaddsws_243_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [D5D5D5D5, D5D5D5D5, D5D5D5D5, 0C090A0B] test_vaddsws_244_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [01020303, 05060707, 08090A0B, 0C0D0E0F] test_vaddsws_245_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [07070706, 07070706, 07070706, 07070706] test_vaddsws_246_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [08050805, 08070807, 08080809, 080A080B] test_vaddsws_247_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [08060786, 080A0889, 08050785, 080B088A] test_vaddsws_248_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [08070909, 78790807, 08080807, 08080808] test_vaddsws_249_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [08080788, 08080887, 08070787, 08090888] test_vaddsws_250_GEN: #_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [08080807, 08080807, 08080807, 08080807] test_vaddsws_251_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [12121212, 12121212, 12121212, 12121212] test_vaddsws_252_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [12121213, 12121213, 12121213, 12121213] test_vaddsws_253_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [12131211, 12111212, 12121212, 12111212] test_vaddsws_254_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [12131415, 16171819, 1A1B1C1D, 1E1F2021] test_vaddsws_255_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [121F121F, 121F121F, 121F121F, 121F121F] test_vaddsws_256_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [12233445, 56677889, 9AABBCCD, DEF00111] test_vaddsws_257_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [13121112, 12131112, 11121311, 12111311] test_vaddsws_258_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [16161616, 16161616, 16161616, 16161616] test_vaddsws_259_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [19191919, 19191919, 19191919, 19191919] test_vaddsws_260_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [1A1A1A1A, 1A1A1A1A, 1A1A1A1A, 1A1A1A1A] test_vaddsws_261_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [2446688A, 99775533, 23344556, 6778899A] test_vaddsws_262_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [51921212, 51D21212, 519EDEDF, 52054545] test_vaddsws_263_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [53321212, D3321212, 53821212, D3821212] test_vaddsws_264_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7FFFFFFF, 16171819, 7FFFFFFF, 1E1F2021] test_vaddsws_265_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [921A2222, 92A11212, 7FFFFFFF, A2121211] test_vaddsws_266_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [D1921212, D1D21212, D19EDEDF, D2054545] test_vaddsws_267_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [D3321212, 53B21212, D3B21212, 54021212] test_vaddsws_268_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [DFDFDFDF, DFDFDFDF, DFDFDFDF, 16131415] test_vaddsws_269_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [0B0C0D0D, 0F101111, 12131415, 16171819] test_vaddsws_270_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [11111110, 11111110, 11111110, 11111110] test_vaddsws_271_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [120F120F, 12111211, 12121213, 12141215] test_vaddsws_272_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [12101190, 12141293, 120F118F, 12151294] test_vaddsws_273_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [12111313, 7FFFFFFF, 12121211, 12121212] test_vaddsws_274_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [12121192, 12121291, 12111191, 12131292] test_vaddsws_275_GEN: #_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [12121211, 12121211, 12121211, 12121211] test_vaddsws_276_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [12345678, 87654321, 11223344, 55667788] test_vaddsws_277_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [12345679, 87654322, 11223345, 55667789] test_vaddsws_278_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [12355677, 87644321, 11223344, 55657788] test_vaddsws_279_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [1235587B, 8B6A4928, 192B3D4F, 61738597] test_vaddsws_280_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [12415685, 8772432E, 112F3351, 55737795] test_vaddsws_281_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [124578AB, CBBAA998, 99BBDDFF, 22446687] test_vaddsws_282_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [13345578, 87664221, 10223443, 55657887] test_vaddsws_283_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [16385A7C, 8B694725, 15263748, 596A7B8C] test_vaddsws_284_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [193B5D7F, 8E6C4A28, 18293A4B, 5C6D7E8F] test_vaddsws_285_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [1A3C5E80, 8F6D4B29, 192A3B4C, 5D6E7F90] test_vaddsws_286_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [2446688A, 99775533, 23344556, 6778899A] test_vaddsws_287_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [51B45678, C7254321, 50AF0011, 7FFFFFFF] test_vaddsws_288_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [53545678, 80000000, 52923344, 16D67788] test_vaddsws_289_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7FFFFFFF, 8B6A4928, 7FFFFFFF, 61738597] test_vaddsws_290_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [923C6688, 80000000, 7FFFFFFF, E5667787] test_vaddsws_291_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [D1B45678, 80000000, D0AF0011, 1559AABB] test_vaddsws_292_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [D3545678, C9054321, D2C23344, 7FFFFFFF] test_vaddsws_293_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [E0022445, 80000000, DEF00111, 5967798B] test_vaddsws_294_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [0B2E5173, 84634220, 11233547, 596B7D8F] test_vaddsws_295_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [11335576, 8664421F, 10213242, 54657686] test_vaddsws_296_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [12315675, 87644320, 11223345, 5568778B] test_vaddsws_297_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [123255F6, 876743A2, 111F32C1, 5569780A] test_vaddsws_298_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [12335779, F7D64320, 11223343, 55667788] test_vaddsws_299_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [123455F8, 876543A0, 112132C3, 55677808] test_vaddsws_300_GEN: #_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [12345677, 87654320, 11223343, 55667787] test_vaddsws_301_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] test_vaddsws_302_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [3F800001, 3FC00001, 3F8CCCCE, 3FF33334] test_vaddsws_303_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [3F80FFFF, 3FBF0000, 3F8CCCCD, 3FF23333] test_vaddsws_304_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [3F810203, 43C50607, 4795D6D8, 4C004142] test_vaddsws_305_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [3F8D000D, 3FCD000D, 3F99CCDA, 40003340] test_vaddsws_306_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [3F912233, 7FFFFFFF, C8267788, 0CD12232] test_vaddsws_307_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [407FFF00, 3FC0FF00, 3E8CCDCC, 3FF23432] test_vaddsws_308_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [43840404, 43C40404, 4390D0D1, 43F73737] test_vaddsws_309_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [46870707, 46C70707, 4693D3D4, 46FA3A3A] test_vaddsws_310_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [47880808, 47C80808, 4794D4D5, 47FB3B3B] test_vaddsws_311_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [51921212, 51D21212, 519EDEDF, 52054545] test_vaddsws_312_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [51B45678, C7254321, 50AF0011, 7FFFFFFF] test_vaddsws_313_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [7FFFFFFF, 00E00000, 7FFFFFFF, 01633333] test_vaddsws_314_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7FFFFFFF, 43C50607, 7FFFFFFF, 4C004142] test_vaddsws_315_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [BF881010, C04F0000, 7FFFFFFF, CFF33332] test_vaddsws_316_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [FF000000, FF800000, FF19999A, FFE66666] test_vaddsws_317_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [00A00000, 7FFFFFFF, 012CCCCD, 7FFFFFFF] test_vaddsws_318_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [0D4DCDCD, 0D8DCDCD, 0D5A9A9A, 43F43536] test_vaddsws_319_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [3879FAFB, 3CBDFEFF, 3F8DCED0, 43F8393A] test_vaddsws_320_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [3E7EFEFE, 3EBEFEFE, 3E8BCBCB, 3EF23231] test_vaddsws_321_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [3F7CFFFD, 3FBEFFFF, 3F8CCCCE, 3FF53336] test_vaddsws_322_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [3F7DFF7E, 3FC20081, 3F89CC4A, 3FF633B5] test_vaddsws_323_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [3F7F0101, 7FFFFFFF, 3F8CCCCC, 3FF33333] test_vaddsws_324_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [3F7FFF80, 3FC0007F, 3F8BCC4C, 3FF433B3] test_vaddsws_325_GEN: #_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [3F7FFFFF, 3FBFFFFF, 3F8CCCCC, 3FF33332] test_vaddsws_326_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [41200000, C1200000, 41700000, C1700000] test_vaddsws_327_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [41200001, C1200001, 41700001, C1700001] test_vaddsws_328_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [4120FFFF, C11F0000, 41700000, C16F0000] test_vaddsws_329_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [41210203, C5250607, 49790A0B, CD7D0E0F] test_vaddsws_330_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [412D000D, C12D000D, 417D000D, C17D000D] test_vaddsws_331_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [41312233, 05756677, CA09AABB, 8E4DEEFF] test_vaddsws_332_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [421FFF00, C120FF00, 407000FF, C16F00FF] test_vaddsws_333_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [45240404, C5240404, 45740404, C5740404] test_vaddsws_334_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [48270707, C8270707, 48770707, C8770707] test_vaddsws_335_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [49280808, C9280808, 49780808, C9780808] test_vaddsws_336_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [53321212, D3321212, 53821212, D3821212] test_vaddsws_337_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [53545678, 80000000, 52923344, 16D67788] test_vaddsws_338_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [7FFFFFFF, 00E00000, 7FFFFFFF, 01633333] test_vaddsws_339_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7FFFFFFF, C5250607, 7FFFFFFF, CD7D0E0F] test_vaddsws_340_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [C1281010, 80000000, 7FFFFFFF, 80000000] test_vaddsws_341_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [00A00000, 80E00000, 00FCCCCD, 81633333] test_vaddsws_342_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [02400000, 02C00000, 03100000, 03600000] test_vaddsws_343_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [0EEDCDCD, 8EEDCDCD, 0F3DCDCD, C5710203] test_vaddsws_344_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [3A19FAFB, BE1DFEFF, 41710203, C5750607] test_vaddsws_345_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [401EFEFE, C01EFEFE, 406EFEFE, C06EFEFE] test_vaddsws_346_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [411CFFFD, C11EFFFF, 41700001, C1720003] test_vaddsws_347_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [411DFF7E, C1220081, 416CFF7D, C1730082] test_vaddsws_348_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [411F0101, 3190FFFF, 416FFFFF, C1700000] test_vaddsws_349_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [411FFF80, C120007F, 416EFF7F, C1710080] test_vaddsws_350_GEN: #_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [411FFFFF, C11FFFFF, 416FFFFF, C16FFFFF] test_vaddsws_351_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] test_vaddsws_352_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [7F800204, 04050608, 7F800A0C, 0C0D0E10] test_vaddsws_353_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [7F810202, 04040607, 7F800A0B, 0C0C0E0F] test_vaddsws_354_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F810406, 080A0C0E, 7FFFFFFF, 181A1C1E] test_vaddsws_355_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [7F8D0210, 04120614, 7F8D0A18, 0C1A0E1C] test_vaddsws_356_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [7F912436, 485A6C7E, 0819B4C6, D8EAFD0E] test_vaddsws_357_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [7FFFFFFF, 04060507, 7E800B0A, 0C0C0F0E] test_vaddsws_358_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [7FFFFFFF, 08090A0B, 7FFFFFFF, 10111213] test_vaddsws_359_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [7FFFFFFF, 0B0C0D0E, 7FFFFFFF, 13141516] test_vaddsws_360_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [7FFFFFFF, 0C0D0E0F, 7FFFFFFF, 14151617] test_vaddsws_361_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [7FFFFFFF, 16171819, 7FFFFFFF, 1E1F2021] test_vaddsws_362_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [7FFFFFFF, 8B6A4928, 7FFFFFFF, 61738597] test_vaddsws_363_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [7FFFFFFF, 43C50607, 7FFFFFFF, 4C004142] test_vaddsws_364_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [7FFFFFFF, C5250607, 7FFFFFFF, CD7D0E0F] test_vaddsws_365_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [FF881213, 84940607, 7FFFFFFF, 9C0D0E0E] test_vaddsws_366_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [3F000203, C3C50607, 3F0CD6D8, CC004142] test_vaddsws_367_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [40A00203, 45A50607, 41200A0B, 4DFD0E0F] test_vaddsws_368_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [4D4DCFD0, D1D2D3D4, 4D4DD7D8, 100E1012] test_vaddsws_369_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [7879FCFE, 01030506, 7F810C0E, 10121416] test_vaddsws_370_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [7E7F0101, 03040505, 7E7F0909, 0B0C0D0D] test_vaddsws_371_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [7F7D0200, 04040606, 7F800A0C, 0C0F0E12] test_vaddsws_372_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [7F7E0181, 04070688, 7F7D0988, 0C100E91] test_vaddsws_373_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [7F7F0304, 74760606, 7F800A0A, 0C0D0E0F] test_vaddsws_374_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [7F800183, 04050686, 7F7F098A, 0C0E0E8F] test_vaddsws_375_GEN: #_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [7F800202, 04050606, 7F800A0A, 0C0D0E0E] test_vaddsws_376_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] test_vaddsws_377_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [80081011, 808F0001, 7FFFFFFF, 90000000] test_vaddsws_378_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [8009100F, 808E0000, 7FFFFFFF, 8FFEFFFF] test_vaddsws_379_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [80091213, 84940607, 7FFFFFFF, 9C0D0E0E] test_vaddsws_380_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [8015101D, 809C000D, 7FFFFFFF, 900D000C] test_vaddsws_381_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [80193243, C4E46677, 0899AABA, 80000000] test_vaddsws_382_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [81080F10, 808FFF00, 7F0000FE, 8FFF00FE] test_vaddsws_383_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [840C1414, 84930404, 7FFFFFFF, 94040403] test_vaddsws_384_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [870F1717, 87960707, 7FFFFFFF, 97070706] test_vaddsws_385_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [88101818, 88970808, 7FFFFFFF, 98080807] test_vaddsws_386_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [921A2222, 92A11212, 7FFFFFFF, A2121211] test_vaddsws_387_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [923C6688, 80000000, 7FFFFFFF, E5667787] test_vaddsws_388_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [BF881010, C04F0000, 7FFFFFFF, CFF33332] test_vaddsws_389_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [C1281010, 80000000, 7FFFFFFF, 80000000] test_vaddsws_390_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [FF881213, 84940607, 7FFFFFFF, 9C0D0E0E] test_vaddsws_391_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [80000000, 80000000, 3F8CCCCC, 80000000] test_vaddsws_392_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [80000000, C22F0000, 419FFFFF, D1EFFFFF] test_vaddsws_393_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [80000000, 80000000, 4DCDCDCC, 94010202] test_vaddsws_394_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [80000000, 80000000, 7FFFFFFF, 94050606] test_vaddsws_395_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [80000000, 80000000, 7EFEFEFD, 8EFEFEFD] test_vaddsws_396_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [8005100D, 808DFFFF, 7FFFFFFF, 90020002] test_vaddsws_397_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [80060F8E, 80910081, 7FFCFF7C, 90030081] test_vaddsws_398_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [80071111, F0FFFFFF, 7FFFFFFE, 8FFFFFFF] test_vaddsws_399_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [80080F90, 808F007F, 7FFEFF7E, 9001007F] test_vaddsws_400_GEN: #_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [8008100F, 808EFFFF, 7FFFFFFE, 8FFFFFFE] test_vaddsws_401_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [BF800000, BFC00000, BF8CCCCD, BFF33333] test_vaddsws_402_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [BF800001, BFC00001, BF8CCCCE, BFF33334] test_vaddsws_403_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [BF80FFFF, BFBF0000, BF8CCCCD, BFF23333] test_vaddsws_404_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [BF810203, C3C50607, C795D6D8, CC004142] test_vaddsws_405_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [BF8D000D, BFCD000D, BF99CCDA, C0003340] test_vaddsws_406_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [BF912233, 04156677, 80000000, 8CD12232] test_vaddsws_407_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [C07FFF00, BFC0FF00, BE8CCDCC, BFF23432] test_vaddsws_408_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [C3840404, C3C40404, C390D0D1, C3F73737] test_vaddsws_409_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [C6870707, C6C70707, C693D3D4, C6FA3A3A] test_vaddsws_410_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [C7880808, C7C80808, C794D4D5, C7FB3B3B] test_vaddsws_411_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [D1921212, D1D21212, D19EDEDF, D2054545] test_vaddsws_412_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [D1B45678, 80000000, D0AF0011, 1559AABB] test_vaddsws_413_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [FF000000, FF800000, FF19999A, FFE66666] test_vaddsws_414_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [00A00000, 80E00000, 00FCCCCD, 81633333] test_vaddsws_415_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [3F000203, C3C50607, 3F0CD6D8, CC004142] test_vaddsws_416_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80000000, 80000000, 3F8CCCCC, 80000000] test_vaddsws_417_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [80A00000, 01600000, 812CCCCD, 01E33333] test_vaddsws_418_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [8D4DCDCD, 8D8DCDCD, 8D5A9A9A, C3F43536] test_vaddsws_419_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [B879FAFB, BCBDFEFF, BF8DCED0, C3F8393A] test_vaddsws_420_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [BE7EFEFE, BEBEFEFE, BE8BCBCB, BEF23231] test_vaddsws_421_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [BF7CFFFD, BFBEFFFF, BF8CCCCE, BFF53336] test_vaddsws_422_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [BF7DFF7E, BFC20081, BF89CC4A, BFF633B5] test_vaddsws_423_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [BF7F0101, 3030FFFF, BF8CCCCC, BFF33333] test_vaddsws_424_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [BF7FFF80, BFC0007F, BF8BCC4C, BFF433B3] test_vaddsws_425_GEN: #_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [BF7FFFFF, BFBFFFFF, BF8CCCCC, BFF33332] test_vaddsws_426_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [C1200000, 41A00000, C1A00000, 41F00000] test_vaddsws_427_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [C1200001, 41A00001, C1A00001, 41F00001] test_vaddsws_428_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [C120FFFF, 419F0000, C1A00000, 41EF0000] test_vaddsws_429_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [C1210203, 45A50607, C9A90A0B, 4DFD0E0F] test_vaddsws_430_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [C12D000D, 41AD000D, C1AD000D, 41FD000D] test_vaddsws_431_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [C1312233, 7FFFFFFF, 80000000, 0ECDEEFF] test_vaddsws_432_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [C21FFF00, 41A0FF00, C0A000FF, 41EF00FF] test_vaddsws_433_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [C5240404, 45A40404, C5A40404, 45F40404] test_vaddsws_434_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [C8270707, 48A70707, C8A70707, 48F70707] test_vaddsws_435_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [C9280808, 49A80808, C9A80808, 49F80808] test_vaddsws_436_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [D3321212, 53B21212, D3B21212, 54021212] test_vaddsws_437_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [D3545678, C9054321, D2C23344, 7FFFFFFF] test_vaddsws_438_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [00A00000, 7FFFFFFF, 012CCCCD, 7FFFFFFF] test_vaddsws_439_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [02400000, 02C00000, 03100000, 03600000] test_vaddsws_440_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [40A00203, 45A50607, 41200A0B, 4DFD0E0F] test_vaddsws_441_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80000000, C22F0000, 419FFFFF, D1EFFFFF] test_vaddsws_442_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [80A00000, 01600000, 812CCCCD, 01E33333] test_vaddsws_443_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [8EEDCDCD, 0F6DCDCD, 8F6DCDCD, 45F10203] test_vaddsws_444_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [BA19FAFB, 3E9DFEFF, C1A10203, 45F50607] test_vaddsws_445_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [C01EFEFE, 409EFEFE, C09EFEFE, 40EEFEFE] test_vaddsws_446_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [C11CFFFD, 419EFFFF, C1A00001, 41F20003] test_vaddsws_447_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [C11DFF7E, 41A20081, C19CFF7D, 41F30082] test_vaddsws_448_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [C11F0101, 7FFFFFFF, C19FFFFF, 41F00000] test_vaddsws_449_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [C11FFF80, 41A0007F, C19EFF7F, 41F10080] test_vaddsws_450_GEN: #_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [C11FFFFF, 419FFFFF, C19FFFFF, 41EFFFFF] test_vaddsws_451_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] test_vaddsws_452_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [CDCDCDCE, CDCDCDCE, CDCDCDCE, 04010204] test_vaddsws_453_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [CDCECDCC, CDCCCDCD, CDCDCDCD, 04000203] test_vaddsws_454_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [CDCECFD0, D1D2D3D4, D5D6D7D8, 100E1012] test_vaddsws_455_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [CDDACDDA, CDDACDDA, CDDACDDA, 040E0210] test_vaddsws_456_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [CDDEF000, 12233444, 80000000, D0DEF102] test_vaddsws_457_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [CECDCCCD, CDCECCCD, CCCDCECC, 04000302] test_vaddsws_458_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [D1D1D1D1, D1D1D1D1, D1D1D1D1, 08050607] test_vaddsws_459_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [D4D4D4D4, D4D4D4D4, D4D4D4D4, 0B08090A] test_vaddsws_460_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [D5D5D5D5, D5D5D5D5, D5D5D5D5, 0C090A0B] test_vaddsws_461_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [DFDFDFDF, DFDFDFDF, DFDFDFDF, 16131415] test_vaddsws_462_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [E0022445, 80000000, DEF00111, 5967798B] test_vaddsws_463_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [0D4DCDCD, 0D8DCDCD, 0D5A9A9A, 43F43536] test_vaddsws_464_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [0EEDCDCD, 8EEDCDCD, 0F3DCDCD, C5710203] test_vaddsws_465_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [4D4DCFD0, D1D2D3D4, 4D4DD7D8, 100E1012] test_vaddsws_466_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80000000, 80000000, 4DCDCDCC, 94010202] test_vaddsws_467_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [8D4DCDCD, 8D8DCDCD, 8D5A9A9A, C3F43536] test_vaddsws_468_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [8EEDCDCD, 0F6DCDCD, 8F6DCDCD, 45F10203] test_vaddsws_469_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [C6C7C8C8, CACBCCCC, CDCECFD0, 0806080A] test_vaddsws_470_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [CCCCCCCB, CCCCCCCB, CCCCCCCB, 03000101] test_vaddsws_471_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [CDCACDCA, CDCCCDCC, CDCDCDCE, 04030206] test_vaddsws_472_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [CDCBCD4B, CDCFCE4E, CDCACD4A, 04040285] test_vaddsws_473_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [CDCCCECE, 3E3ECDCC, CDCDCDCC, 04010203] test_vaddsws_474_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [CDCDCD4D, CDCDCE4C, CDCCCD4C, 04020283] test_vaddsws_475_GEN: #_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [CDCDCDCC, CDCDCDCC, CDCDCDCC, 04010202] test_vaddsws_476_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] test_vaddsws_477_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [F8F9FAFC, FCFDFF00, 00010204, 04050608] test_vaddsws_478_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [F8FAFAFA, FCFCFEFF, 00010203, 04040607] test_vaddsws_479_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [F8FAFCFE, 01030506, 080A0C0E, 10121416] test_vaddsws_480_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [F906FB08, FD0AFF0C, 000E0210, 04120614] test_vaddsws_481_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [F90B1D2E, 41536576, 889AACBE, D0E2F506] test_vaddsws_482_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [F9F9F9FB, FCFEFDFF, FF010302, 04040706] test_vaddsws_483_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [FCFDFEFF, 01020303, 04050607, 08090A0B] test_vaddsws_484_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [00010202, 04050606, 0708090A, 0B0C0D0E] test_vaddsws_485_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [01020303, 05060707, 08090A0B, 0C0D0E0F] test_vaddsws_486_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [0B0C0D0D, 0F101111, 12131415, 16171819] test_vaddsws_487_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [0B2E5173, 84634220, 11233547, 596B7D8F] test_vaddsws_488_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3879FAFB, 3CBDFEFF, 3F8DCED0, 43F8393A] test_vaddsws_489_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [3A19FAFB, BE1DFEFF, 41710203, C5750607] test_vaddsws_490_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7879FCFE, 01030506, 7F810C0E, 10121416] test_vaddsws_491_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80000000, 80000000, 7FFFFFFF, 94050606] test_vaddsws_492_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [B879FAFB, BCBDFEFF, BF8DCED0, C3F8393A] test_vaddsws_493_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [BA19FAFB, 3E9DFEFF, C1A10203, 45F50607] test_vaddsws_494_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [C6C7C8C8, CACBCCCC, CDCECFD0, 0806080A] test_vaddsws_495_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [F7F8F9F9, FBFCFDFD, FF000101, 03040505] test_vaddsws_496_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [F8F6FAF8, FCFCFEFE, 00010204, 0407060A] test_vaddsws_497_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [F8F7FA79, FCFFFF80, FFFE0180, 04080689] test_vaddsws_498_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [F8F8FBFC, 6D6EFEFE, 00010202, 04050607] test_vaddsws_499_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [F8F9FA7B, FCFDFF7E, 00000182, 04060687] test_vaddsws_500_GEN: #_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [F8F9FAFA, FCFDFEFE, 00010202, 04050606] test_vaddsws_501_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] test_vaddsws_502_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [FEFEFEFF, FEFEFEFF, FEFEFEFF, FEFEFEFF] test_vaddsws_503_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [FEFFFEFD, FEFDFEFE, FEFEFEFE, FEFDFEFE] test_vaddsws_504_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [FF000101, 03040505, 07080909, 0B0C0D0D] test_vaddsws_505_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [FF0BFF0B, FF0BFF0B, FF0BFF0B, FF0BFF0B] test_vaddsws_506_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [FF102131, 43546575, 8798A9B9, CBDCEDFD] test_vaddsws_507_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [FFFEFDFE, FEFFFDFE, FDFEFFFD, FEFDFFFD] test_vaddsws_508_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [03030302, 03030302, 03030302, 03030302] test_vaddsws_509_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [06060605, 06060605, 06060605, 06060605] test_vaddsws_510_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [07070706, 07070706, 07070706, 07070706] test_vaddsws_511_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [11111110, 11111110, 11111110, 11111110] test_vaddsws_512_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [11335576, 8664421F, 10213242, 54657686] test_vaddsws_513_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3E7EFEFE, 3EBEFEFE, 3E8BCBCB, 3EF23231] test_vaddsws_514_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [401EFEFE, C01EFEFE, 406EFEFE, C06EFEFE] test_vaddsws_515_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7E7F0101, 03040505, 7E7F0909, 0B0C0D0D] test_vaddsws_516_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80000000, 80000000, 7EFEFEFD, 8EFEFEFD] test_vaddsws_517_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BE7EFEFE, BEBEFEFE, BE8BCBCB, BEF23231] test_vaddsws_518_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C01EFEFE, 409EFEFE, C09EFEFE, 40EEFEFE] test_vaddsws_519_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CCCCCCCB, CCCCCCCB, CCCCCCCB, 03000101] test_vaddsws_520_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F7F8F9F9, FBFCFDFD, FF000101, 03040505] test_vaddsws_521_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FEFBFEFB, FEFDFEFD, FEFEFEFF, FF00FF01] test_vaddsws_522_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FEFCFE7C, FF00FF7F, FEFBFE7B, FF01FF80] test_vaddsws_523_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [FEFDFFFF, 6F6FFEFD, FEFEFEFD, FEFEFEFE] test_vaddsws_524_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [FEFEFE7E, FEFEFF7D, FEFDFE7D, FEFFFF7E] test_vaddsws_525_GEN: #_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [FEFEFEFD, FEFEFEFD, FEFEFEFD, FEFEFEFD] test_vaddsws_526_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] test_vaddsws_527_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [FFFCFFFE, FFFF0000, 00000002, 00020004] test_vaddsws_528_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [FFFDFFFC, FFFDFFFF, 00000001, 00010003] test_vaddsws_529_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [FFFE0200, 04040606, 08090A0C, 0C0F0E12] test_vaddsws_530_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000A000A, 000C000C, 000D000E, 000F0010] test_vaddsws_531_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [000E2230, 44546676, 8899AABC, CCDFEF02] test_vaddsws_532_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [00FCFEFD, FFFFFEFF, FF000100, 00010102] test_vaddsws_533_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04010401, 04030403, 04040405, 04060407] test_vaddsws_534_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07040704, 07060706, 07070708, 0709070A] test_vaddsws_535_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08050805, 08070807, 08080809, 080A080B] test_vaddsws_536_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [120F120F, 12111211, 12121213, 12141215] test_vaddsws_537_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [12315675, 87644320, 11223345, 5568778B] test_vaddsws_538_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F7CFFFD, 3FBEFFFF, 3F8CCCCE, 3FF53336] test_vaddsws_539_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [411CFFFD, C11EFFFF, 41700001, C1720003] test_vaddsws_540_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F7D0200, 04040606, 7F800A0C, 0C0F0E12] test_vaddsws_541_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [8005100D, 808DFFFF, 7FFFFFFF, 90020002] test_vaddsws_542_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF7CFFFD, BFBEFFFF, BF8CCCCE, BFF53336] test_vaddsws_543_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C11CFFFD, 419EFFFF, C1A00001, 41F20003] test_vaddsws_544_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCACDCA, CDCCCDCC, CDCDCDCE, 04030206] test_vaddsws_545_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8F6FAF8, FCFCFEFE, 00010204, 0407060A] test_vaddsws_546_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FEFBFEFB, FEFDFEFD, FEFEFEFF, FF00FF01] test_vaddsws_547_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FFFAFF7B, 00010080, FFFCFF7E, 00050085] test_vaddsws_548_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [FFFC00FE, 706FFFFE, 00000000, 00020003] test_vaddsws_549_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [FFFCFF7D, FFFF007E, FFFEFF80, 00030083] test_vaddsws_550_GEN: #_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [FFFCFFFC, FFFEFFFE, 00000000, 00020002] test_vaddsws_551_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] test_vaddsws_552_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [FFFDFF7F, 00020082, FFFCFF7E, 00030083] test_vaddsws_553_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [FFFEFF7D, 00010081, FFFCFF7D, 00020082] test_vaddsws_554_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [FFFF0181, 04070688, 08060988, 0C100E91] test_vaddsws_555_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000AFF8B, 000F008E, 0009FF8A, 0010008F] test_vaddsws_556_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [000F21B1, 445766F8, 8896AA38, CCE0EF81] test_vaddsws_557_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [00FDFE7E, 0002FF81, FEFD007C, 00020181] test_vaddsws_558_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04020382, 04060485, 04010381, 04070486] test_vaddsws_559_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07050685, 07090788, 07040684, 070A0789] test_vaddsws_560_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08060786, 080A0889, 08050785, 080B088A] test_vaddsws_561_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12101190, 12141293, 120F118F, 12151294] test_vaddsws_562_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [123255F6, 876743A2, 111F32C1, 5569780A] test_vaddsws_563_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F7DFF7E, 3FC20081, 3F89CC4A, 3FF633B5] test_vaddsws_564_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [411DFF7E, C1220081, 416CFF7D, C1730082] test_vaddsws_565_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F7E0181, 04070688, 7F7D0988, 0C100E91] test_vaddsws_566_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80060F8E, 80910081, 7FFCFF7C, 90030081] test_vaddsws_567_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF7DFF7E, BFC20081, BF89CC4A, BFF633B5] test_vaddsws_568_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C11DFF7E, 41A20081, C19CFF7D, 41F30082] test_vaddsws_569_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCBCD4B, CDCFCE4E, CDCACD4A, 04040285] test_vaddsws_570_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8F7FA79, FCFFFF80, FFFE0180, 04080689] test_vaddsws_571_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FEFCFE7C, FF00FF7F, FEFBFE7B, FF01FF80] test_vaddsws_572_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FFFAFF7B, 00010080, FFFCFF7E, 00050085] test_vaddsws_573_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [FFFD007F, 70730080, FFFCFF7C, 00030082] test_vaddsws_574_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [FFFDFEFE, 00020100, FFFBFEFC, 00040102] test_vaddsws_575_GEN: #_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [FFFDFF7D, 00020080, FFFCFF7C, 00030081] test_vaddsws_576_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] test_vaddsws_577_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [FFFF0102, 70710000, 00000000, 00000001] test_vaddsws_578_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [00000100, 706FFFFF, FFFFFFFF, FFFF0000] test_vaddsws_579_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [00000304, 74760606, 08090A0A, 0C0D0E0F] test_vaddsws_580_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000C010E, 707E000C, 000D000C, 000D000D] test_vaddsws_581_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [00102334, 7FFFFFFF, 8899AABA, CCDDEEFF] test_vaddsws_582_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [00FF0001, 7071FEFF, FF0000FE, FFFF00FF] test_vaddsws_583_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04030505, 74750403, 04040403, 04040404] test_vaddsws_584_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07060808, 77780706, 07070706, 07070707] test_vaddsws_585_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08070909, 78790807, 08080807, 08080808] test_vaddsws_586_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12111313, 7FFFFFFF, 12121211, 12121212] test_vaddsws_587_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [12335779, F7D64320, 11223343, 55667788] test_vaddsws_588_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F7F0101, 7FFFFFFF, 3F8CCCCC, 3FF33333] test_vaddsws_589_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [411F0101, 3190FFFF, 416FFFFF, C1700000] test_vaddsws_590_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F7F0304, 74760606, 7F800A0A, 0C0D0E0F] test_vaddsws_591_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80071111, F0FFFFFF, 7FFFFFFE, 8FFFFFFF] test_vaddsws_592_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF7F0101, 3030FFFF, BF8CCCCC, BFF33333] test_vaddsws_593_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C11F0101, 7FFFFFFF, C19FFFFF, 41F00000] test_vaddsws_594_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCCCECE, 3E3ECDCC, CDCDCDCC, 04010203] test_vaddsws_595_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8F8FBFC, 6D6EFEFE, 00010202, 04050607] test_vaddsws_596_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FEFDFFFF, 6F6FFEFD, FEFEFEFD, FEFEFEFE] test_vaddsws_597_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FFFC00FE, 706FFFFE, 00000000, 00020003] test_vaddsws_598_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FFFD007F, 70730080, FFFCFF7C, 00030082] test_vaddsws_599_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [FFFF0081, 7071007E, FFFEFF7E, 00010080] test_vaddsws_600_GEN: #_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [FFFF0100, 7070FFFE, FFFFFFFE, FFFFFFFF] test_vaddsws_601_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] test_vaddsws_602_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [FFFFFF81, 00000080, FFFEFF80, 00010081] test_vaddsws_603_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [0000FF7F, FFFF007F, FFFEFF7F, 00000080] test_vaddsws_604_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [00010183, 04050686, 0808098A, 0C0E0E8F] test_vaddsws_605_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000CFF8D, 000D008C, 000BFF8C, 000E008D] test_vaddsws_606_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [001121B3, 445566F6, 8898AA3A, CCDEEF7F] test_vaddsws_607_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [00FFFE80, 0000FF7F, FEFF007E, 0000017F] test_vaddsws_608_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04040384, 04040483, 04030383, 04050484] test_vaddsws_609_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07070687, 07070786, 07060686, 07080787] test_vaddsws_610_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08080788, 08080887, 08070787, 08090888] test_vaddsws_611_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12121192, 12121291, 12111191, 12131292] test_vaddsws_612_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [123455F8, 876543A0, 112132C3, 55677808] test_vaddsws_613_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F7FFF80, 3FC0007F, 3F8BCC4C, 3FF433B3] test_vaddsws_614_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [411FFF80, C120007F, 416EFF7F, C1710080] test_vaddsws_615_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F800183, 04050686, 7F7F098A, 0C0E0E8F] test_vaddsws_616_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [80080F90, 808F007F, 7FFEFF7E, 9001007F] test_vaddsws_617_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF7FFF80, BFC0007F, BF8BCC4C, BFF433B3] test_vaddsws_618_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C11FFF80, 41A0007F, C19EFF7F, 41F10080] test_vaddsws_619_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCDCD4D, CDCDCE4C, CDCCCD4C, 04020283] test_vaddsws_620_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8F9FA7B, FCFDFF7E, 00000182, 04060687] test_vaddsws_621_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FEFEFE7E, FEFEFF7D, FEFDFE7D, FEFFFF7E] test_vaddsws_622_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FFFCFF7D, FFFF007E, FFFEFF80, 00030083] test_vaddsws_623_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FFFDFEFE, 00020100, FFFBFEFC, 00040102] test_vaddsws_624_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [FFFF0081, 7071007E, FFFEFF7E, 00010080] test_vaddsws_625_GEN: #_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v3 [FFFFFF7F, 0000007E, FFFEFF7E, 0001007F] test_vaddsws_626_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] test_vaddsws_627_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] test_vaddsws_628_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000] #_ REGISTER_OUT v3 [0000FFFE, FFFEFFFF, FFFFFFFF, FFFEFFFF] test_vaddsws_629_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [00010202, 04050606, 08090A0A, 0C0D0E0E] test_vaddsws_630_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D] #_ REGISTER_OUT v3 [000D000C, 000D000C, 000D000C, 000D000C] test_vaddsws_631_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF] #_ REGISTER_OUT v3 [00112232, 44556676, 8899AABA, CCDDEEFE] test_vaddsws_632_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF] #_ REGISTER_OUT v3 [00FFFEFF, 0000FEFF, FF0000FE, FFFF00FE] test_vaddsws_633_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404] #_ REGISTER_OUT v3 [04040403, 04040403, 04040403, 04040403] test_vaddsws_634_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707] #_ REGISTER_OUT v3 [07070706, 07070706, 07070706, 07070706] test_vaddsws_635_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808] #_ REGISTER_OUT v3 [08080807, 08080807, 08080807, 08080807] test_vaddsws_636_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212] #_ REGISTER_OUT v3 [12121211, 12121211, 12121211, 12121211] test_vaddsws_637_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788] #_ REGISTER_OUT v3 [12345677, 87654320, 11223343, 55667787] test_vaddsws_638_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333] #_ REGISTER_OUT v3 [3F7FFFFF, 3FBFFFFF, 3F8CCCCC, 3FF33332] test_vaddsws_639_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000] #_ REGISTER_OUT v3 [411FFFFF, C11FFFFF, 416FFFFF, C16FFFFF] test_vaddsws_640_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F] #_ REGISTER_OUT v3 [7F800202, 04050606, 7F800A0A, 0C0D0E0E] test_vaddsws_641_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF] #_ REGISTER_OUT v3 [8008100F, 808EFFFF, 7FFFFFFE, 8FFFFFFE] test_vaddsws_642_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333] #_ REGISTER_OUT v3 [BF7FFFFF, BFBFFFFF, BF8CCCCC, BFF33332] test_vaddsws_643_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000] #_ REGISTER_OUT v3 [C11FFFFF, 419FFFFF, C19FFFFF, 41EFFFFF] test_vaddsws_644_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203] #_ REGISTER_OUT v3 [CDCDCDCC, CDCDCDCC, CDCDCDCC, 04010202] test_vaddsws_645_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607] #_ REGISTER_OUT v3 [F8F9FAFA, FCFDFEFE, 00010202, 04050606] test_vaddsws_646_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE] #_ REGISTER_OUT v3 [FEFEFEFD, FEFEFEFD, FEFEFEFD, FEFEFEFD] test_vaddsws_647_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003] #_ REGISTER_OUT v3 [FFFCFFFC, FFFEFFFE, 00000000, 00020002] test_vaddsws_648_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082] #_ REGISTER_OUT v3 [FFFDFF7D, 00020080, FFFCFF7C, 00030081] test_vaddsws_649_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000] #_ REGISTER_OUT v3 [FFFF0100, 7070FFFE, FFFFFFFE, FFFFFFFF] test_vaddsws_650_GEN: #_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] vaddsws v3, v1, v2 blr #_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080] #_ REGISTER_OUT v3 [FFFFFF7F, 0000007E, FFFEFF7E, 0001007F]