test_stvxl_1:
  # Store vector with cache hint (least recently used)
  #_ MEMORY_IN 0x0000000010001000 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
  #_ REGISTER_IN r4 0x0000000010001000
  #_ REGISTER_IN v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
  li r5, 0
  stvxl v3, r4, r5
  blr
  #_ REGISTER_OUT r4 0x0000000010001000
  #_ REGISTER_OUT r5 0
  #_ REGISTER_OUT v3 [01020304, 05060708, 090A0B0C, 0D0E0F10]
  #_ MEMORY_OUT 10001000 0102030405060708090A0B0C0D0E0F10

test_stvxl_2:
  # Test with offset
  #_ MEMORY_IN 0x0000000010001000 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
  #_ MEMORY_IN 0x0000000010001010 [CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC, CC]
  #_ REGISTER_IN r4 0x0000000010001000
  #_ REGISTER_IN v3 [AABBCCDD, EEFF0011, 22334455, 66778899]
  li r5, 16
  stvxl v3, r4, r5
  blr
  #_ REGISTER_OUT r4 0x0000000010001000
  #_ REGISTER_OUT r5 16
  #_ REGISTER_OUT v3 [AABBCCDD, EEFF0011, 22334455, 66778899]
  #_ MEMORY_OUT 10001010 AABBCCDDEEFF00112233445566778899