test_vcmpgtsw_1: #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000] vcmpgtsw v5, v3, v4 blr #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] test_vcmpgtsw_2: #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] vcmpgtsw v5, v3, v4 blr #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000] #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] test_vcmpgtsw_3: #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001] vcmpgtsw v5, v3, v4 blr #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] test_vcmpgtsw_4: #_ REGISTER_IN v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] #_ REGISTER_IN v4 [7FFFFFFE, 7FFFFFFE, 7FFFFFFE, 7FFFFFFE] vcmpgtsw v5, v3, v4 blr #_ REGISTER_OUT v3 [7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF] #_ REGISTER_OUT v4 [7FFFFFFE, 7FFFFFFE, 7FFFFFFE, 7FFFFFFE] #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] test_vcmpgtsw_5: #_ REGISTER_IN v3 [80000000, 80000000, 80000000, 80000000] #_ REGISTER_IN v4 [80000001, 80000001, 80000001, 80000001] vcmpgtsw v5, v3, v4 blr #_ REGISTER_OUT v3 [80000000, 80000000, 80000000, 80000000] #_ REGISTER_OUT v4 [80000001, 80000001, 80000001, 80000001] #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000] test_vcmpgtsw_6: #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] vcmpgtsw v5, v3, v4 blr #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001] #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF] #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]