test_vavguw_1:
  #_ REGISTER_IN v3 [00000002, 00000004, 00000006, 00000008]
  #_ REGISTER_IN v4 [00000001, 00000003, 00000005, 00000007]
  vavguw v5, v3, v4
  blr
  #_ REGISTER_OUT v3 [00000002, 00000004, 00000006, 00000008]
  #_ REGISTER_OUT v4 [00000001, 00000003, 00000005, 00000007]
  #_ REGISTER_OUT v5 [00000002, 00000004, 00000006, 00000008]

test_vavguw_2:
  #_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
  #_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
  vavguw v5, v3, v4
  blr
  #_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
  #_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
  #_ REGISTER_OUT v5 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]

test_vavguw_3:
  #_ REGISTER_IN v3 [00000000, 00000000, 00000000, 00000000]
  #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000]
  vavguw v5, v3, v4
  blr
  #_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
  #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000]
  #_ REGISTER_OUT v5 [00000000, 00000000, 00000000, 00000000]

test_vavguw_4:
  #_ REGISTER_IN v3 [80000000, 80000000, 80000000, 80000000]
  #_ REGISTER_IN v4 [80000000, 80000000, 80000000, 80000000]
  vavguw v5, v3, v4
  blr
  #_ REGISTER_OUT v3 [80000000, 80000000, 80000000, 80000000]
  #_ REGISTER_OUT v4 [80000000, 80000000, 80000000, 80000000]
  #_ REGISTER_OUT v5 [80000000, 80000000, 80000000, 80000000]

test_vavguw_5:
  #_ REGISTER_IN v3 [00000001, 00000001, 00000001, 00000001]
  #_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000]
  vavguw v5, v3, v4
  blr
  #_ REGISTER_OUT v3 [00000001, 00000001, 00000001, 00000001]
  #_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000]
  #_ REGISTER_OUT v5 [00000001, 00000001, 00000001, 00000001]