3c06921cd4
Added recognition of impossible comparisons via NZM and optimize them away Recognize (x + -y) and transform to (x - y) for constants Recognize (~x ) + 1 and transform to -x Check and transform comparisons if theyre semantically equal to others Detect comparisons of single-bit values with their only possible non-zero value and transform to true/false tests Transform ==0 to IS_FALSE, !=0 to IS_TRUE Truncate to int8 if operand for IS_TRUE/IS_FALSE has a nzm of 1 Reduced code generated for SubDidCarry slightly Add special case for InstrEmit_srawix if mask == 1 Cut down the code generated for trap instructions, instead of naive or'ing or compare results do a switch and select the best condition Rerun simplification pass until no changes, as some optimizations will enable others to be done Enable rel32 call optimization by default
125 lines
3.2 KiB
C++
125 lines
3.2 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_CPU_HIR_INSTR_H_
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#define XENIA_CPU_HIR_INSTR_H_
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#include "xenia/cpu/hir/opcodes.h"
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#include "xenia/cpu/hir/value.h"
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namespace xe {
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namespace cpu {
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class Function;
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} // namespace cpu
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} // namespace xe
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namespace xe {
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namespace cpu {
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namespace hir {
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class Block;
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class Label;
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class Instr {
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public:
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Block* block;
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Instr* next;
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Instr* prev;
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const OpcodeInfo* opcode;
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uint16_t flags;
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uint32_t ordinal;
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typedef union {
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Function* symbol;
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Label* label;
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Value* value;
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uint64_t offset;
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} Op;
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Value* dest;
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Op src1;
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Op src2;
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Op src3;
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Value::Use* src1_use;
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Value::Use* src2_use;
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Value::Use* src3_use;
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void set_src1(Value* value);
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void set_src2(Value* value);
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void set_src3(Value* value);
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void MoveBefore(Instr* other);
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void Replace(const OpcodeInfo* new_opcode, uint16_t new_flags);
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void Remove();
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template <typename TPredicate>
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std::pair<Value*, Value*> BinaryValueArrangeByPredicateExclusive(
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TPredicate&& pred) {
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auto src1_value = src1.value;
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auto src2_value = src2.value;
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if (!src1_value || !src2_value) return {nullptr, nullptr};
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if (!opcode) return {nullptr, nullptr}; // impossible!
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// check if binary opcode taking two values. we dont care if the dest is a
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// value
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if (!IsOpcodeBinaryValue(opcode->signature)) return {nullptr, nullptr};
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if (pred(src1_value)) {
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if (pred(src2_value)) {
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return {nullptr, nullptr};
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} else {
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return {src1_value, src2_value};
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}
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} else if (pred(src2_value)) {
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return {src2_value, src1_value};
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} else {
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return {nullptr, nullptr};
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}
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}
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/*
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if src1 is constant, and src2 is not, return [src1, src2]
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if src2 is constant, and src1 is not, return [src2, src1]
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if neither is constant, return nullptr, nullptr
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if both are constant, return nullptr, nullptr
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*/
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std::pair<Value*, Value*> BinaryValueArrangeAsConstAndVar() {
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return BinaryValueArrangeByPredicateExclusive(
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[](Value* value) { return value->IsConstant(); });
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}
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std::pair<Value*, Value*> BinaryValueArrangeByDefiningOpcode(
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const OpcodeInfo* op_ptr) {
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return BinaryValueArrangeByPredicateExclusive([op_ptr](Value* value) {
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return value->def && value->def->opcode == op_ptr;
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});
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}
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Instr* GetDestDefSkipAssigns();
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// returns [def op, constant]
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std::pair<Value*, Value*> BinaryValueArrangeByDefOpAndConstant(
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const OpcodeInfo* op_ptr) {
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auto result = BinaryValueArrangeByDefiningOpcode(op_ptr);
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if (!result.first) return result;
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if (!result.second->IsConstant()) {
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return {nullptr, nullptr};
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}
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return result;
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}
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};
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} // namespace hir
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} // namespace cpu
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} // namespace xe
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#endif // XENIA_CPU_HIR_INSTR_H_
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