Files
Xenia-Canary/third_party
Herman S. 24c671bf63 [Testing/binutils] Fix VMX128 instruction definitions
Add dcbz128 instruction with opcode X(31,1014) | (1<<21)
dcbz and dcbz128 share extended opcode 1014, distinguished by
bit 21 (RT field): dcbz has RT=0, dcbz128 has RT=1.

Fix vspltisw128 operand list to {VD128, SIMM}
Removed incorrect VB128 operand; instruction only takes
destination and immediate value.

Fix VPERM128 field definition from 8-bit to 0xff
The vperm128 permute control is an 8-bit value (0-255),
not a 3-bit value (0-7).

Fix VC128 field flags from PPC_OPERAND_VR to 0
VC128 is a 3-bit immediate field, not a vector register operand.
2026-02-13 15:05:23 +09:00
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