132 lines
2.6 KiB
ArmAsm
132 lines
2.6 KiB
ArmAsm
test_mulhwu_1:
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#_ REGISTER_IN r4 1
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#_ REGISTER_IN r5 0
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 1
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#_ REGISTER_OUT r5 0
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test_mulhwu_1_constant:
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li r4, 1
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li r5, 0
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 1
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#_ REGISTER_OUT r5 0
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test_mulhwu_2:
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#_ REGISTER_IN r4 0x00000000FFFFFFFF
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#_ REGISTER_IN r5 1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0x00000000FFFFFFFF
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#_ REGISTER_OUT r5 1
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test_mulhwu_2_constant:
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li r4, -1
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clrldi r4, r4, 32
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li r5, 1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0x00000000FFFFFFFF
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#_ REGISTER_OUT r5 1
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test_mulhwu_3:
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#_ REGISTER_IN r4 0x00000001FFFFFFFF
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#_ REGISTER_IN r5 1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0x00000001FFFFFFFF
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#_ REGISTER_OUT r5 1
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test_mulhwu_3_constant:
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li r4, -1
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clrldi r4, r4, 31
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li r5, 1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0x00000001FFFFFFFF
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#_ REGISTER_OUT r5 1
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test_mulhwu_4:
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#_ REGISTER_IN r4 0x800000007FFFFFFF
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#_ REGISTER_IN r5 1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0x800000007FFFFFFF
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#_ REGISTER_OUT r5 1
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test_mulhwu_4_constant:
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li r4, -1
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clrldi r4, r4, 33
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li r5, 1
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sldi r5, r5, 63
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or r4, r4, r5
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li r5, 1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0x800000007FFFFFFF
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#_ REGISTER_OUT r5 1
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test_mulhwu_5:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 1
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test_mulhwu_5_constant:
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li r4, -1
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li r5, 1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 1
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test_mulhwu_6:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 0xFFFFFFFFFFFFFFFF
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0x00000000FFFFFFFE
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
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test_mulhwu_6_constant:
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li r4, -1
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li r5, -1
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mulhwu r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0x00000000FFFFFFFE
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
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test_mulhwu_7:
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#_ REGISTER_IN r0 0x1
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#_ REGISTER_IN r3 0xFFFFFFFF
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mulhwu. r0, r3, r0
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blr
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#_ REGISTER_OUT r0 0
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#_ REGISTER_OUT r3 0xFFFFFFFF
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#_ REGISTER_OUT cr 0x0000000020000000
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test_mulhwu_8:
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#_ REGISTER_IN r0 0x1
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#_ REGISTER_IN r3 0x1FFFFFFFF
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mulhwu. r0, r3, r0
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blr
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#_ REGISTER_OUT r0 0
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#_ REGISTER_OUT r3 0x1FFFFFFFF
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#_ REGISTER_OUT cr 0x0000000020000000
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