324a8eb818
"turns out theres a lot of quirks with the div instructions we havent been covering if the denom is 0, we jump to the end and mov eax/rax to dst, which is correct because ppc raises no exceptions for divide by 0 unlike x86 except we don't initialize eax before that jump, so whatever garbage from the previous sequence that has been left in eax/rax is what the result of the instruction will be and then in our constant folding, we don't do the same zero check in Value::Div, so if we constant folded the denom to 0 we will host crash the ppc manual says the result for a division by 0 is undefined, but in reality it seems it is always 0 there are a few posts i saw from googling about it, and tests on my rgh gave me 0, but then another issue came up and that is that we dont check for signed overflow in our division, so we raise an exception if guest code ever does (1<<signbit_pos) / -1 signed overflow in division also produces 0 on ppc the last thing is that if src2 is constant we skip the 0 check for division without checking if its nonzero all weird, likely very rare edge cases, except for maybe the signed overflow division chrispy — Today at 9:51 AM oh yeah, and because the int members of constantvalue are all signed ints, we were actually doing signed division always with constant folding" fixed an earlier mistake by me with the precision of fresx made some optimization disableable implemented vkpkx fixed possible bugs with vsr/vsl constant folding disabled the nice imul code for now, there was a bug with int64 version and i dont have time to check started on multiplication/addition/subtraction/division identities Removed optimized VSL implementation, it's going to have to be rewritten anyway Added ppc_ctx_t to xboxkrnl shim for direct context access started working on KeSaveFloatingPointState, re'ed most of it Exposed some more state/functionality to the kernel for implementing lower level routines like the save/restore ones Add cvar to re-enable incorrect mxcsr behavior if a user doesnt care and wants better cpu performance Stubbed out more impossible sequences, replace mul_hi_i32 with a 64 bit multiply
94 lines
3.9 KiB
C++
94 lines
3.9 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2013 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_CPU_COMPILER_PASSES_SIMPLIFICATION_PASS_H_
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#define XENIA_CPU_COMPILER_PASSES_SIMPLIFICATION_PASS_H_
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#include "xenia/cpu/compiler/passes/conditional_group_subpass.h"
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namespace xe {
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namespace cpu {
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namespace compiler {
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namespace passes {
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using ScalarNZM = uint64_t;
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class SimplificationPass : public ConditionalGroupSubpass {
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public:
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SimplificationPass();
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~SimplificationPass() override;
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bool Run(hir::HIRBuilder* builder, bool& result) override;
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private:
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bool EliminateConversions(hir::HIRBuilder* builder);
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bool CheckTruncate(hir::Instr* i);
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bool CheckByteSwap(hir::Instr* i);
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bool SimplifyAssignments(hir::HIRBuilder* builder);
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hir::Value* CheckValue(hir::Value* value, bool& result);
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bool SimplifyBitArith(hir::HIRBuilder* builder);
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// handles simple multiplication/addition rules
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bool SimplifyBasicArith(hir::HIRBuilder* builder);
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bool SimplifyBasicArith(hir::Instr* i, hir::HIRBuilder* builder);
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bool SimplifyAddArith(hir::Instr* i, hir::HIRBuilder* builder);
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bool SimplifySubArith(hir::Instr* i, hir::HIRBuilder* builder);
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// handle either or or xor with 0
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bool CheckOrXorZero(hir::Instr* i);
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bool CheckOr(hir::Instr* i, hir::HIRBuilder* builder);
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bool CheckXor(hir::Instr* i, hir::HIRBuilder* builder);
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bool CheckAnd(hir::Instr* i, hir::HIRBuilder* builder);
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bool CheckAdd(hir::Instr* i, hir::HIRBuilder* builder);
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bool CheckSelect(hir::Instr* i, hir::HIRBuilder* builder,
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hir::Value* condition, hir::Value* iftrue,
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hir::Value* iffalse);
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bool CheckSelect(hir::Instr* i, hir::HIRBuilder* builder);
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bool CheckScalarConstCmp(hir::Instr* i, hir::HIRBuilder* builder);
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bool CheckIsTrueIsFalse(hir::Instr* i, hir::HIRBuilder* builder);
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bool CheckSHRByConst(hir::Instr* i, hir::HIRBuilder* builder,
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hir::Value* variable, unsigned int shift);
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bool CheckSHR(hir::Instr* i, hir::HIRBuilder* builder);
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bool CheckSAR(hir::Instr* i, hir::HIRBuilder* builder);
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// called by CheckXor, handles transforming a 1 bit value xored against 1
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bool CheckBooleanXor1(hir::Instr* i, hir::HIRBuilder* builder,
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hir::Value* xored);
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bool CheckXorOfTwoBools(hir::Instr* i, hir::HIRBuilder* builder,
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hir::Value* b1, hir::Value* b2);
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// for rlwinm
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bool TryHandleANDROLORSHLSeq(hir::Instr* i, hir::HIRBuilder* builder);
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bool TransformANDROLORSHLSeq(
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hir::Instr* i, // the final instr in the rlwinm sequence (the AND)
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hir::HIRBuilder* builder,
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ScalarNZM input_nzm, // the NZM of the value being rot'ed/masked (input)
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uint64_t mask, // mask after rotation
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uint64_t rotation, // rot amount prior to masking
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hir::Instr* input_def, // the defining instr of the input var
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hir::Value* input // the input variable to the rlwinm
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);
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static bool Is1BitOpcode(hir::Opcode def_opcode);
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/* we currently have no caching, and although it is rare some games
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may have massive (in the hundreds) chains of ands + ors + shifts in
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a single unbroken basic block (exsploderman web of shadows) */
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static constexpr unsigned MAX_NZM_DEPTH = 16;
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// todo: use valuemask
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// returns maybenonzeromask for value (mask of bits that may possibly hold
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// information)
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static ScalarNZM GetScalarNZM(const hir::Value* value, unsigned depth = 0);
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};
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} // namespace passes
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} // namespace compiler
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} // namespace cpu
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} // namespace xe
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#endif // XENIA_CPU_COMPILER_PASSES_SIMPLIFICATION_PASS_H_
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