40 lines
1.4 KiB
ArmAsm
40 lines
1.4 KiB
ArmAsm
test_vsro_1:
|
|
#_ REGISTER_IN v3 [00112233, 44556677, 8899AABB, CCDDEEFF]
|
|
#_ REGISTER_IN v4 [04040404, 04040404, 04040404, 04040404]
|
|
vsro v3, v3, v4
|
|
blr
|
|
#_ REGISTER_OUT v3 [00112233, 44556677, 8899AABB, CCDDEEFF]
|
|
#_ REGISTER_OUT v4 [04040404, 04040404, 04040404, 04040404]
|
|
|
|
test_vsro_2:
|
|
#_ REGISTER_IN v3 [00112233, 44556677, 8899AABB, CCDDEEFF]
|
|
#_ REGISTER_IN v4 [08080808, 08080808, 08080808, 08080808]
|
|
vsro v3, v3, v4
|
|
blr
|
|
#_ REGISTER_OUT v3 [00001122, 33445566, 778899AA, BBCCDDEE]
|
|
#_ REGISTER_OUT v4 [08080808, 08080808, 08080808, 08080808]
|
|
|
|
test_vsro_3:
|
|
#_ REGISTER_IN v3 [00112233, 44556677, 8899AABB, CCDDEEFF]
|
|
#_ REGISTER_IN v4 [12121212, 12121212, 12121212, 12121212]
|
|
vsro v3, v3, v4
|
|
blr
|
|
#_ REGISTER_OUT v3 [00000011, 22334455, 66778899, AABBCCDD]
|
|
#_ REGISTER_OUT v4 [12121212, 12121212, 12121212, 12121212]
|
|
|
|
test_vsro_4:
|
|
#_ REGISTER_IN v3 [00112233, 44556677, 8899AABB, CCDDEEFF]
|
|
#_ REGISTER_IN v4 [80808080, 80808080, 80808080, 80808080]
|
|
vsro v3, v3, v4
|
|
blr
|
|
#_ REGISTER_OUT v3 [00112233, 44556677, 8899AABB, CCDDEEFF]
|
|
#_ REGISTER_OUT v4 [80808080, 80808080, 80808080, 80808080]
|
|
|
|
test_vsro_5:
|
|
#_ REGISTER_IN v3 [00112233, 44556677, 8899AABB, CCDDEEFF]
|
|
#_ REGISTER_IN v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
|
|
vsro v3, v3, v4
|
|
blr
|
|
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
|
|
#_ REGISTER_OUT v4 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
|