126 lines
2.4 KiB
ArmAsm
126 lines
2.4 KiB
ArmAsm
test_srd_1:
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#_ REGISTER_IN r4 1
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#_ REGISTER_IN r5 0
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 1
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#_ REGISTER_OUT r4 1
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#_ REGISTER_OUT r5 0
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test_srd_1_constant:
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li r4, 1
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li r5, 0
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 1
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#_ REGISTER_OUT r4 1
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#_ REGISTER_OUT r5 0
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test_srd_2:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 0
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 0
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test_srd_2_constant:
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li r4, -1
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li r5, 0
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 0
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test_srd_3:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 1
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0x7FFFFFFFFFFFFFFF
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 1
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test_srd_3_constant:
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li r4, -1
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li r5, 1
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0x7FFFFFFFFFFFFFFF
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 1
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test_srd_4:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 62
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0x0000000000000003
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 62
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test_srd_4_constant:
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li r4, -1
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li r5, 62
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0x0000000000000003
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 62
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test_srd_5:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 63
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0x0000000000000001
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 63
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test_srd_5_constant:
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li r4, -1
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li r5, 63
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0x0000000000000001
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 63
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test_srd_6:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 64
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 64
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test_srd_6_constant:
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li r4, -1
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li r5, 64
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 64
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test_srd_7:
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#_ REGISTER_IN r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_IN r5 100
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 100
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test_srd_7_constant:
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li r4, -1
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li r5, 100
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srd r3, r4, r5
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blr
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#_ REGISTER_OUT r3 0
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#_ REGISTER_OUT r4 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r5 100
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