883c2030d0
Based entirely off existing xbyak x86 implementation and available tests. Still needs a lot of optimization and testing on non-Windows platforms. So far passes all tests and boots at least some games on Windows.
420 lines
12 KiB
C++
420 lines
12 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2026 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_CPU_BACKEND_A64_A64_OP_H_
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#define XENIA_CPU_BACKEND_A64_A64_OP_H_
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#include "xenia/cpu/backend/a64/a64_emitter.h"
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#include "xenia/cpu/hir/instr.h"
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namespace xe {
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namespace cpu {
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namespace backend {
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namespace a64 {
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using namespace xe::cpu;
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using namespace xe::cpu::hir;
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using namespace Xbyak_aarch64;
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// Selects the right byte/word/etc from a vector. PPC is big-endian so
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// we need to flip logical indices (0,1,2,3,4,5,6,7,...) = (3,2,1,0,7,6,5,4,...)
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#define VEC128_B(n) ((n) ^ 0x3)
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#define VEC128_W(n) ((n) ^ 0x1)
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#define VEC128_D(n) (n)
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#define VEC128_F(n) (n)
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enum KeyType {
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KEY_TYPE_X = OPCODE_SIG_TYPE_X,
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KEY_TYPE_L = OPCODE_SIG_TYPE_L,
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KEY_TYPE_O = OPCODE_SIG_TYPE_O,
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KEY_TYPE_S = OPCODE_SIG_TYPE_S,
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KEY_TYPE_V_I8 = OPCODE_SIG_TYPE_V + INT8_TYPE,
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KEY_TYPE_V_I16 = OPCODE_SIG_TYPE_V + INT16_TYPE,
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KEY_TYPE_V_I32 = OPCODE_SIG_TYPE_V + INT32_TYPE,
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KEY_TYPE_V_I64 = OPCODE_SIG_TYPE_V + INT64_TYPE,
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KEY_TYPE_V_F32 = OPCODE_SIG_TYPE_V + FLOAT32_TYPE,
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KEY_TYPE_V_F64 = OPCODE_SIG_TYPE_V + FLOAT64_TYPE,
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KEY_TYPE_V_V128 = OPCODE_SIG_TYPE_V + VEC128_TYPE,
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};
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using InstrKeyValue = uint32_t;
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#pragma pack(push, 1)
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union InstrKey {
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InstrKeyValue value;
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struct {
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InstrKeyValue opcode : 8;
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InstrKeyValue dest : 5;
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InstrKeyValue src1 : 5;
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InstrKeyValue src2 : 5;
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InstrKeyValue src3 : 5;
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InstrKeyValue reserved : 4;
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};
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operator InstrKeyValue() const { return value; }
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InstrKey() : value(0) { static_assert_size(*this, sizeof(value)); }
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InstrKey(InstrKeyValue v) : value(v) {}
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InstrKey(const Instr* i) : value(0) {
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const OpcodeInfo* info = i->GetOpcodeInfo();
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InstrKeyValue sig = info->signature;
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OpcodeSignatureType dest_type, src1_type, src2_type, src3_type;
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UnpackOpcodeSig(sig, dest_type, src1_type, src2_type, src3_type);
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InstrKeyValue out_desttype = (InstrKeyValue)dest_type;
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InstrKeyValue out_src1type = (InstrKeyValue)src1_type;
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InstrKeyValue out_src2type = (InstrKeyValue)src2_type;
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InstrKeyValue out_src3type = (InstrKeyValue)src3_type;
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Value* destv = i->dest;
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Value* src1v = i->src1.value;
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Value* src2v = i->src2.value;
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Value* src3v = i->src3.value;
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if (out_src1type == OPCODE_SIG_TYPE_V) {
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out_src1type += src1v->type;
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}
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if (out_src2type == OPCODE_SIG_TYPE_V) {
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out_src2type += src2v->type;
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}
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if (out_src3type == OPCODE_SIG_TYPE_V) {
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out_src3type += src3v->type;
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}
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opcode = info->num;
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dest = out_desttype ? OPCODE_SIG_TYPE_V + destv->type : 0;
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src1 = out_src1type;
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src2 = out_src2type;
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src3 = out_src3type;
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}
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template <Opcode OPCODE, KeyType DEST = KEY_TYPE_X, KeyType SRC1 = KEY_TYPE_X,
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KeyType SRC2 = KEY_TYPE_X, KeyType SRC3 = KEY_TYPE_X>
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struct Construct {
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static const InstrKeyValue value =
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(OPCODE) | (DEST << 8) | (SRC1 << 13) | (SRC2 << 18) | (SRC3 << 23);
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};
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};
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#pragma pack(pop)
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static_assert(sizeof(InstrKey) <= 4, "Key must be 4 bytes");
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// ============================================================================
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// Op types — architecture-independent
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// ============================================================================
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struct OpBase {};
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template <typename T, KeyType KEY_TYPE>
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struct Op : OpBase {
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static constexpr KeyType key_type = KEY_TYPE;
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};
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struct VoidOp : Op<VoidOp, KEY_TYPE_X> {
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protected:
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template <hir::Opcode OPCODE, typename... Ts>
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friend struct I;
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void Load(const Instr::Op& op) {}
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};
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struct OffsetOp : Op<OffsetOp, KEY_TYPE_O> {
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uint64_t value;
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protected:
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template <hir::Opcode OPCODE, typename... Ts>
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friend struct I;
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void Load(const Instr::Op& op) { this->value = op.offset; }
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};
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struct SymbolOp : Op<SymbolOp, KEY_TYPE_S> {
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Function* value;
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protected:
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template <hir::Opcode OPCODE, typename... Ts>
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friend struct I;
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bool Load(const Instr::Op& op) {
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this->value = op.symbol;
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return true;
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}
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};
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struct LabelOp : Op<LabelOp, KEY_TYPE_L> {
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hir::Label* value;
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protected:
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template <hir::Opcode OPCODE, typename... Ts>
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friend struct I;
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void Load(const Instr::Op& op) { this->value = op.label; }
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};
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// ============================================================================
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// ValueOp — ARM64 register type specializations
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// ============================================================================
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template <typename T, KeyType KEY_TYPE, typename REG_TYPE, typename CONST_TYPE>
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struct ValueOp : Op<ValueOp<T, KEY_TYPE, REG_TYPE, CONST_TYPE>, KEY_TYPE> {
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typedef REG_TYPE reg_type;
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const Value* value;
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bool is_constant;
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virtual bool ConstantFitsIn32Reg() const { return true; }
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const REG_TYPE& reg() const {
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assert_true(!is_constant);
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return reg_;
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}
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operator const REG_TYPE&() const { return reg(); }
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bool IsEqual(const T& b) const {
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if (is_constant && b.is_constant) {
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return reinterpret_cast<const T*>(this)->constant() == b.constant();
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} else if (!is_constant && !b.is_constant) {
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return reg_.getIdx() == b.reg_.getIdx();
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}
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return false;
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}
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bool operator==(const T& b) const { return IsEqual(b); }
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bool operator!=(const T& b) const { return !IsEqual(b); }
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void Load(const Instr::Op& op) {
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value = op.value;
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is_constant = value->IsConstant();
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if (!is_constant) {
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A64Emitter::SetupReg(value, reg_);
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}
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}
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protected:
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REG_TYPE reg_ = REG_TYPE(0);
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};
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// ARM64 integer operands use WReg (32-bit) and XReg (64-bit).
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// I8 and I16 are handled via WReg with masking/extension as needed.
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struct I8Op : ValueOp<I8Op, KEY_TYPE_V_I8, WReg, int8_t> {
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typedef ValueOp<I8Op, KEY_TYPE_V_I8, WReg, int8_t> BASE;
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int8_t constant() const {
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assert_true(BASE::is_constant);
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return BASE::value->constant.i8;
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}
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};
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struct I16Op : ValueOp<I16Op, KEY_TYPE_V_I16, WReg, int16_t> {
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typedef ValueOp<I16Op, KEY_TYPE_V_I16, WReg, int16_t> BASE;
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int16_t constant() const {
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assert_true(BASE::is_constant);
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return BASE::value->constant.i16;
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}
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};
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struct I32Op : ValueOp<I32Op, KEY_TYPE_V_I32, WReg, int32_t> {
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typedef ValueOp<I32Op, KEY_TYPE_V_I32, WReg, int32_t> BASE;
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int32_t constant() const {
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assert_true(BASE::is_constant);
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return BASE::value->constant.i32;
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}
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};
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struct I64Op : ValueOp<I64Op, KEY_TYPE_V_I64, XReg, int64_t> {
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typedef ValueOp<I64Op, KEY_TYPE_V_I64, XReg, int64_t> BASE;
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int64_t constant() const {
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assert_true(BASE::is_constant);
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return BASE::value->constant.i64;
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}
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bool ConstantFitsIn32Reg() const override {
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int64_t v = BASE::value->constant.i64;
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if ((v & ~0x7FFFFFFF) == 0) {
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return true;
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} else if ((v & ~0x7FFFFFFFUL) == ~0x7FFFFFFFUL) {
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return true;
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}
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return false;
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}
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};
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// ARM64 float/vector operands use SReg, DReg, QReg.
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struct F32Op : ValueOp<F32Op, KEY_TYPE_V_F32, SReg, float> {
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typedef ValueOp<F32Op, KEY_TYPE_V_F32, SReg, float> BASE;
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float constant() const {
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assert_true(BASE::is_constant);
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return BASE::value->constant.f32;
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}
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};
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struct F64Op : ValueOp<F64Op, KEY_TYPE_V_F64, DReg, double> {
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typedef ValueOp<F64Op, KEY_TYPE_V_F64, DReg, double> BASE;
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double constant() const {
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assert_true(BASE::is_constant);
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return BASE::value->constant.f64;
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}
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};
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struct V128Op : ValueOp<V128Op, KEY_TYPE_V_V128, QReg, vec128_t> {
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typedef ValueOp<V128Op, KEY_TYPE_V_V128, QReg, vec128_t> BASE;
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const vec128_t& constant() const {
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assert_true(BASE::is_constant);
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return BASE::value->constant.v128;
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}
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};
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// ============================================================================
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// DestField — handles loading the destination operand
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// ============================================================================
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template <typename DEST, typename... Tf>
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struct DestField;
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template <typename DEST>
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struct DestField<DEST> {
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DEST dest;
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protected:
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bool LoadDest(const Instr* i) {
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Instr::Op op;
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op.value = i->dest;
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dest.Load(op);
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return true;
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}
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};
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template <>
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struct DestField<VoidOp> {
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protected:
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bool LoadDest(const Instr* i) { return true; }
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};
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// ============================================================================
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// I<> — instruction pattern with 0-3 source operands
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// ============================================================================
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template <hir::Opcode OPCODE, typename... Ts>
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struct I;
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template <hir::Opcode OPCODE, typename DEST>
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struct I<OPCODE, DEST> : DestField<DEST> {
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typedef DestField<DEST> BASE;
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static constexpr hir::Opcode opcode = OPCODE;
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static const uint32_t key =
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InstrKey::Construct<OPCODE, DEST::key_type>::value;
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static const KeyType dest_type = DEST::key_type;
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const Instr* instr;
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protected:
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template <typename SEQ, typename T>
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friend struct Sequence;
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bool Load(const Instr* i, InstrKeyValue kv) {
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if (kv == key && BASE::LoadDest(i)) {
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instr = i;
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return true;
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}
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return false;
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}
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};
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template <hir::Opcode OPCODE, typename DEST, typename SRC1>
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struct I<OPCODE, DEST, SRC1> : DestField<DEST> {
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typedef DestField<DEST> BASE;
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static constexpr hir::Opcode opcode = OPCODE;
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static const uint32_t key =
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InstrKey::Construct<OPCODE, DEST::key_type, SRC1::key_type>::value;
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static const KeyType dest_type = DEST::key_type;
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static const KeyType src1_type = SRC1::key_type;
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const Instr* instr;
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SRC1 src1;
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protected:
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template <typename SEQ, typename T>
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friend struct Sequence;
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bool Load(const Instr* i, InstrKeyValue kv) {
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if (kv == key && BASE::LoadDest(i)) {
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instr = i;
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src1.Load(i->src1);
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return true;
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}
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return false;
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}
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};
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template <hir::Opcode OPCODE, typename DEST, typename SRC1, typename SRC2>
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struct I<OPCODE, DEST, SRC1, SRC2> : DestField<DEST> {
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typedef DestField<DEST> BASE;
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static constexpr hir::Opcode opcode = OPCODE;
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static const uint32_t key =
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InstrKey::Construct<OPCODE, DEST::key_type, SRC1::key_type,
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SRC2::key_type>::value;
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static const KeyType dest_type = DEST::key_type;
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static const KeyType src1_type = SRC1::key_type;
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static const KeyType src2_type = SRC2::key_type;
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const Instr* instr;
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SRC1 src1;
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SRC2 src2;
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protected:
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template <typename SEQ, typename T>
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friend struct Sequence;
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bool Load(const Instr* i, InstrKeyValue kv) {
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if (kv == key && BASE::LoadDest(i)) {
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instr = i;
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src1.Load(i->src1);
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src2.Load(i->src2);
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return true;
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}
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return false;
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}
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};
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template <hir::Opcode OPCODE, typename DEST, typename SRC1, typename SRC2,
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typename SRC3>
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struct I<OPCODE, DEST, SRC1, SRC2, SRC3> : DestField<DEST> {
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typedef DestField<DEST> BASE;
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static constexpr hir::Opcode opcode = OPCODE;
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static const uint32_t key =
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InstrKey::Construct<OPCODE, DEST::key_type, SRC1::key_type,
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SRC2::key_type, SRC3::key_type>::value;
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static const KeyType dest_type = DEST::key_type;
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static const KeyType src1_type = SRC1::key_type;
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static const KeyType src2_type = SRC2::key_type;
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static const KeyType src3_type = SRC3::key_type;
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const Instr* instr;
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SRC1 src1;
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SRC2 src2;
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SRC3 src3;
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protected:
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template <typename SEQ, typename T>
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friend struct Sequence;
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bool Load(const Instr* i, InstrKeyValue ikey) {
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if (ikey == key && BASE::LoadDest(i)) {
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instr = i;
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src1.Load(i->src1);
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src2.Load(i->src2);
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src3.Load(i->src3);
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return true;
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}
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return false;
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}
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};
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// ============================================================================
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// Sequence<> — base for all ARM64 instruction sequences
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// ============================================================================
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template <typename SEQ, typename T>
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struct Sequence {
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typedef T EmitArgType;
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static constexpr uint32_t head_key() { return T::key; }
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static bool Select(A64Emitter& e, const Instr* i, InstrKeyValue ikey) {
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T args;
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if (!args.Load(i, ikey)) {
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return false;
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}
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SEQ::Emit(e, args);
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return true;
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}
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};
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} // namespace a64
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} // namespace backend
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} // namespace cpu
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} // namespace xe
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#endif // XENIA_CPU_BACKEND_A64_A64_OP_H_
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