7cc364dcb8
mark raw clock functions as noinline, the way msvc was inlining them and ordering the branches meant that rdtsc would often be speculatively executed add alternative clock impl for win, instead of using queryperformancecounter we grab systemtime from kusershared. it does not have the same precision as queryperformancecounter, we only have 100 nanosecond precision, but we round to milliseconds so it never made sense to use the performance counter in the first place stubbed out the "guest clock mutex"... (the entirety of clock.cc needs a rewrite) added some helpers for minf/maxf without the nan handling behavior
111 lines
3.7 KiB
C++
111 lines
3.7 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2020 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#include "xenia/base/clock.h"
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#include "xenia/base/platform.h"
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#if XE_ARCH_AMD64 && XE_CLOCK_RAW_AVAILABLE
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#include "xenia/base/logging.h"
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// Wrap all these different cpu compiler intrinsics.
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// So no inline assembler here and the compiler will remove the clutter.
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#if XE_COMPILER_MSVC
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#define xe_cpu_cpuid(level, eax, ebx, ecx, edx) \
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{ \
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int __xe_cpuid_registers_[4]; \
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__cpuid(__xe_cpuid_registers_, (level)); \
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(eax) = static_cast<uint32_t>(__xe_cpuid_registers_[0]); \
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(ebx) = static_cast<uint32_t>(__xe_cpuid_registers_[1]); \
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(ecx) = static_cast<uint32_t>(__xe_cpuid_registers_[2]); \
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(edx) = static_cast<uint32_t>(__xe_cpuid_registers_[3]); \
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}
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#define xe_cpu_rdtsc() __rdtsc()
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#elif XE_COMPILER_CLANG || XE_COMPILER_GNUC
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#include <cpuid.h>
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#define xe_cpu_cpuid(level, eax, ebx, ecx, edx) \
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__cpuid((level), (eax), (ebx), (ecx), (edx));
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#define xe_cpu_rdtsc() __rdtsc()
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#else
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#error "No cpu instruction wrappers for current compiler implemented."
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#endif
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#define CLOCK_FATAL(msg) \
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xe::FatalError("The raw clock source is not supported on your CPU.\n" msg \
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"\n" \
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"Set the cvar 'clock_source_raw' to 'false'.");
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namespace xe {
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// Getting the TSC frequency can be a bit tricky. This method here only works on
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// Intel as it seems. There is no easy way to get the frequency outside of ring0
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// on AMD, so we fail gracefully if not possible.
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XE_NOINLINE
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uint64_t Clock::host_tick_frequency_raw() {
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uint32_t eax, ebx, ecx, edx;
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// 00H Get max supported cpuid level.
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xe_cpu_cpuid(0x0, eax, ebx, ecx, edx);
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auto max_cpuid = eax;
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// 80000000H Get max extended cpuid level
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xe_cpu_cpuid(0x80000000, eax, ebx, ecx, edx);
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auto max_cpuid_ex = eax;
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// 80000007H Get extended power feature info
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if (max_cpuid_ex >= 0x80000007) {
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xe_cpu_cpuid(0x80000007, eax, ebx, ecx, edx);
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// Invariant TSC bit at position 8
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auto tsc_invariant = edx & (1 << 8);
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// If the TSC is not invariant it will change its frequency with power
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// states and across cores.
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if (!tsc_invariant) {
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CLOCK_FATAL("The CPU has no invariant TSC.");
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return 0;
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}
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} else {
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CLOCK_FATAL("Unclear if the CPU has an invariant TSC.")
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return 0;
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}
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if (max_cpuid >= 0x15) {
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// 15H Get TSC/Crystal ratio and Crystal Hz.
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xe_cpu_cpuid(0x15, eax, ebx, ecx, edx);
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uint64_t ratio_num = ebx;
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uint64_t ratio_den = eax;
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uint64_t cryst_freq = ecx;
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// For some CPUs, Crystal frequency is not reported.
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if (ratio_num && ratio_den && cryst_freq) {
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// If it is, calculate the TSC frequency
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return cryst_freq * ratio_num / ratio_den;
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}
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}
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if (max_cpuid >= 0x16) {
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// 16H Get CPU base frequency MHz in EAX.
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xe_cpu_cpuid(0x16, eax, ebx, ecx, edx);
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uint64_t cpu_base_freq = static_cast<uint64_t>(eax) * 1000000;
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assert(cpu_base_freq);
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return cpu_base_freq;
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}
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CLOCK_FATAL("The clock frequency could not be determined.");
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return 0;
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}
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XE_NOINLINE
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uint64_t Clock::host_tick_count_raw() { return xe_cpu_rdtsc(); }
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} // namespace xe
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#endif
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