Herman S. a769d70761 [CPU] Detect FPSCR exceptions in UpdateFPSCR for Rc=1 FPU instructions ...

Implement SNaN detection and FPSCR exception tracking so that Rc=1 FPU
instructions (fadds., fmadds., etc.) correctly update CR1 with FPSCR
exception summary bits (FX, FEX, VX, OX). Previously these were
hardcoded to zero. Enable ~2k tests that were previously disabled.

2026-02-15 00:59:27 +09:00

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xenia

[CPU] Detect FPSCR exceptions in UpdateFPSCR for Rc=1 FPU instructions

2026-02-15 00:59:27 +09:00