d372d8d5e3
Remove the logger_ != nullptr check from shouldlog, it will nearly always be true except on initialization and gets checked later anyway, this shrinks the size of the generated code for some Select specialized vastcpy for current cpu, for now only have paths for MOVDIR64B and generic avx1 Add XE_UNLIKELY/LIKELY if, they map better to the c++ unlikely/likely attributes which we will need to use soon Finished reimplementing STVL/STVR/LVL/LVR as their own opcodes. we now generate far less code for these instructions. this also means optimization passes can be written to simplify/remove/replace these instructions in some cases. Found that a good deal of the X86 we were emitting for these instructions was dead code or redundant. the reduction in generated HIR/x86 should help a lot with compilation times and make function precompilation more feasible as a default Don't static assert in default prefetch impl, in c++20 the assertion will be triggered even without an instantiation Reorder some if/else to prod msvc into ordering the branches optimally. it somewhat worked... Added some notes about which opcodes should be removed/refactored Dispatch in WriteRegister via vector compares for the bounds. still not very optimal, we ought to be checking whether any register in a range may be special A lot of work on trying to optimize writeregister, moved wraparound path into a noinline function based on profiling info Hoist the IsUcodeAnalyzed check out of AnalyzeShader, instead check it before each call. Profiler recorded many hits in the stack frame setup of the function, but none in the actual body of it, so the check is often true but the stack frame setup is run unconditionally Pre-check whether we're about to write a single register from a ring Replace more jump tables from draw_util/texture_info with popcnt based sparse indexing/bit tables/shuffle lookups Place the GPU register file on its own VAD/virtual allocation, it is no longer a member of graphics system
309 lines
10 KiB
C++
309 lines
10 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2014 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_GPU_TEXTURE_INFO_H_
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#define XENIA_GPU_TEXTURE_INFO_H_
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#include <array>
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#include <cstring>
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#include <memory>
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#include "xenia/base/assert.h"
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#include "xenia/gpu/xenos.h"
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namespace xe {
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namespace gpu {
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#if XE_ARCH_AMD64 == 1
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struct GetBaseFormatHelper {
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uint64_t indexer_;
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// chrispy: todo, can encode deltas or a SHIFT+ADD for remapping the input
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// format to the base, the shuffle lookup isnt great
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std::array<int8_t, 16> remap_;
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};
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constexpr GetBaseFormatHelper PrecomputeGetBaseFormatTable() {
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#define R(x, y) xenos::TextureFormat::x, xenos::TextureFormat::y
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constexpr xenos::TextureFormat entries[] = {
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R(k_16_EXPAND, k_16_FLOAT),
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R(k_16_16_EXPAND, k_16_16_FLOAT),
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R(k_16_16_16_16_EXPAND, k_16_16_16_16_FLOAT),
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R(k_8_8_8_8_AS_16_16_16_16, k_8_8_8_8),
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R(k_DXT1_AS_16_16_16_16, k_DXT1),
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R(k_DXT2_3_AS_16_16_16_16, k_DXT2_3),
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R(k_DXT4_5_AS_16_16_16_16, k_DXT4_5),
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R(k_2_10_10_10_AS_16_16_16_16, k_2_10_10_10),
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R(k_10_11_11_AS_16_16_16_16, k_10_11_11),
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R(k_11_11_10_AS_16_16_16_16, k_11_11_10),
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R(k_8_8_8_8_GAMMA_EDRAM, k_8_8_8_8)};
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#undef R
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uint64_t need_remap_table = 0ULL;
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constexpr unsigned num_entries = sizeof(entries) / sizeof(entries[0]);
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for (unsigned i = 0; i < num_entries / 2; ++i) {
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need_remap_table |= 1ULL << static_cast<uint32_t>(entries[i * 2]);
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}
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std::array<int8_t, 16> remap{0};
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for (unsigned i = 0; i < num_entries / 2; ++i) {
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remap[i] = static_cast<int8_t>(static_cast<uint32_t>(entries[(i * 2) + 1]));
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}
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return GetBaseFormatHelper{need_remap_table, remap};
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}
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inline xenos::TextureFormat GetBaseFormat(xenos::TextureFormat texture_format) {
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constexpr GetBaseFormatHelper helper = PrecomputeGetBaseFormatTable();
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constexpr uint64_t indexer_table = helper.indexer_;
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constexpr std::array<int8_t, 16> table = helper.remap_;
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uint64_t format_mask = 1ULL << static_cast<uint32_t>(texture_format);
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if ((indexer_table & format_mask)) {
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uint64_t trailing_mask = format_mask - 1ULL;
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uint64_t trailing_bits = indexer_table & trailing_mask;
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uint32_t sparse_index = xe::bit_count(trailing_bits);
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__m128i index_in_low =
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_mm_cvtsi32_si128(static_cast<int>(sparse_index) | 0x80808000);
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__m128i new_format_low = _mm_shuffle_epi8(
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_mm_setr_epi8(table[0], table[1], table[2], table[3], table[4],
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table[5], table[6], table[7], table[8], table[9],
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table[10], table[11], table[12], 0, 0, 0),
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index_in_low);
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uint32_t prelaundered =
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static_cast<uint32_t>(_mm_cvtsi128_si32(new_format_low));
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return *reinterpret_cast<xenos::TextureFormat*>(&prelaundered);
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} else {
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return texture_format;
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}
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}
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#else
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inline xenos::TextureFormat GetBaseFormat(xenos::TextureFormat texture_format) {
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// These formats are used for resampling textures / gamma control.
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// 11 entries
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switch (texture_format) {
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case xenos::TextureFormat::k_16_EXPAND:
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return xenos::TextureFormat::k_16_FLOAT;
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case xenos::TextureFormat::k_16_16_EXPAND:
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return xenos::TextureFormat::k_16_16_FLOAT;
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case xenos::TextureFormat::k_16_16_16_16_EXPAND:
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return xenos::TextureFormat::k_16_16_16_16_FLOAT;
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case xenos::TextureFormat::k_8_8_8_8_AS_16_16_16_16:
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return xenos::TextureFormat::k_8_8_8_8;
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case xenos::TextureFormat::k_DXT1_AS_16_16_16_16:
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return xenos::TextureFormat::k_DXT1;
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case xenos::TextureFormat::k_DXT2_3_AS_16_16_16_16:
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return xenos::TextureFormat::k_DXT2_3;
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case xenos::TextureFormat::k_DXT4_5_AS_16_16_16_16:
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return xenos::TextureFormat::k_DXT4_5;
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case xenos::TextureFormat::k_2_10_10_10_AS_16_16_16_16:
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return xenos::TextureFormat::k_2_10_10_10;
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case xenos::TextureFormat::k_10_11_11_AS_16_16_16_16:
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return xenos::TextureFormat::k_10_11_11;
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case xenos::TextureFormat::k_11_11_10_AS_16_16_16_16:
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return xenos::TextureFormat::k_11_11_10;
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case xenos::TextureFormat::k_8_8_8_8_GAMMA_EDRAM:
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return xenos::TextureFormat::k_8_8_8_8;
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default:
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break;
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}
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return texture_format;
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}
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#endif
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inline size_t GetTexelSize(xenos::TextureFormat format) {
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switch (format) {
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case xenos::TextureFormat::k_1_5_5_5:
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return 2;
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case xenos::TextureFormat::k_2_10_10_10:
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return 4;
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case xenos::TextureFormat::k_4_4_4_4:
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return 2;
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case xenos::TextureFormat::k_5_6_5:
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return 2;
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case xenos::TextureFormat::k_8:
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return 1;
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case xenos::TextureFormat::k_8_8:
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return 2;
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case xenos::TextureFormat::k_8_8_8_8:
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return 4;
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case xenos::TextureFormat::k_16:
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return 4;
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case xenos::TextureFormat::k_16_FLOAT:
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return 4;
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case xenos::TextureFormat::k_16_16:
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return 4;
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case xenos::TextureFormat::k_16_16_FLOAT:
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return 4;
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case xenos::TextureFormat::k_16_16_16_16:
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return 8;
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case xenos::TextureFormat::k_16_16_16_16_FLOAT:
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return 8;
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case xenos::TextureFormat::k_32_FLOAT:
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return 4;
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case xenos::TextureFormat::k_32_32_FLOAT:
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return 8;
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case xenos::TextureFormat::k_32_32_32_32_FLOAT:
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return 16;
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case xenos::TextureFormat::k_10_11_11:
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case xenos::TextureFormat::k_11_11_10:
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return 4;
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default:
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assert_unhandled_case(format);
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return 0;
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}
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}
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inline xenos::TextureFormat ColorFormatToTextureFormat(
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xenos::ColorFormat color_format) {
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return static_cast<xenos::TextureFormat>(color_format);
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}
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inline xenos::TextureFormat DepthRenderTargetToTextureFormat(
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xenos::DepthRenderTargetFormat depth_format) {
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switch (depth_format) {
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case xenos::DepthRenderTargetFormat::kD24S8:
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return xenos::TextureFormat::k_24_8;
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case xenos::DepthRenderTargetFormat::kD24FS8:
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return xenos::TextureFormat::k_24_8_FLOAT;
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default:
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assert_unhandled_case(depth_format);
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return xenos::TextureFormat(~0);
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}
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}
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enum class FormatType {
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// Uncompressed, and is also a ColorFormat.
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kResolvable,
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// Uncompressed, but resolve or memory export cannot be done to the format.
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kUncompressed,
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kCompressed,
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};
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struct FormatInfo {
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xenos::TextureFormat format;
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const char* name;
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FormatType type;
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uint32_t block_width;
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uint32_t block_height;
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uint32_t bits_per_pixel;
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uint32_t bytes_per_block() const {
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return block_width * block_height * bits_per_pixel / 8;
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}
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static const FormatInfo* Get(uint32_t gpu_format);
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static const FormatInfo* Get(xenos::TextureFormat format) {
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return Get(static_cast<uint32_t>(format));
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}
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};
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struct TextureInfo;
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struct TextureExtent {
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uint32_t pitch; // texel pitch
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uint32_t height; // texel height
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uint32_t block_width; // # of horizontal visible blocks
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uint32_t block_height; // # of vertical visible blocks
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uint32_t block_pitch_h; // # of horizontal pitch blocks
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uint32_t block_pitch_v; // # of vertical pitch blocks
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uint32_t depth;
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uint32_t all_blocks() const { return block_pitch_h * block_pitch_v * depth; }
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uint32_t visible_blocks() const {
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return block_pitch_h * block_height * depth;
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}
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static TextureExtent Calculate(const FormatInfo* format_info, uint32_t pitch,
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uint32_t height, uint32_t depth, bool is_tiled,
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bool is_guest);
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static TextureExtent Calculate(const TextureInfo* texture_info,
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bool is_guest);
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};
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struct TextureMemoryInfo {
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uint32_t base_address;
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uint32_t base_size;
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uint32_t mip_address;
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uint32_t mip_size;
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};
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struct TextureInfo {
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xenos::TextureFormat format;
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xenos::Endian endianness;
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xenos::DataDimension dimension;
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uint32_t width; // width in pixels
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uint32_t height; // height in pixels
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uint32_t depth; // depth in layers
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uint32_t pitch; // pitch in blocks
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uint32_t mip_min_level;
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uint32_t mip_max_level;
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bool is_stacked;
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bool is_tiled;
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bool has_packed_mips;
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TextureMemoryInfo memory;
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TextureExtent extent;
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const FormatInfo* format_info() const {
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return FormatInfo::Get(static_cast<uint32_t>(format));
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}
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bool is_compressed() const {
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return format_info()->type == FormatType::kCompressed;
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}
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uint32_t mip_levels() const { return 1 + (mip_max_level - mip_min_level); }
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static bool Prepare(const xenos::xe_gpu_texture_fetch_t& fetch,
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TextureInfo* out_info);
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static bool PrepareResolve(uint32_t physical_address,
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xenos::TextureFormat texture_format,
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xenos::Endian endian, uint32_t pitch,
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uint32_t width, uint32_t height, uint32_t depth,
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TextureInfo* out_info);
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uint32_t GetMaxMipLevels() const;
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const TextureExtent GetMipExtent(uint32_t mip, bool is_guest) const;
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void GetMipSize(uint32_t mip, uint32_t* width, uint32_t* height) const;
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// Get the memory location of a mip. offset_x and offset_y are in blocks.
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uint32_t GetMipLocation(uint32_t mip, uint32_t* offset_x, uint32_t* offset_y,
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bool is_guest) const;
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static bool GetPackedTileOffset(uint32_t width, uint32_t height,
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const FormatInfo* format_info,
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int packed_tile, uint32_t* offset_x,
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uint32_t* offset_y);
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bool GetPackedTileOffset(int packed_tile, uint32_t* offset_x,
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uint32_t* offset_y) const;
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uint64_t hash() const;
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bool operator==(const TextureInfo& other) const {
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return std::memcmp(this, &other, sizeof(TextureInfo)) == 0;
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}
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private:
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void SetupMemoryInfo(uint32_t base_address, uint32_t mip_address);
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};
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} // namespace gpu
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} // namespace xe
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#endif // XENIA_GPU_TEXTURE_INFO_H_
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