48 lines
1.7 KiB
ArmAsm
48 lines
1.7 KiB
ArmAsm
test_vslw_1:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000]
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vslw v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000]
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test_vslw_2:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00000001, 00000001, 00000001, 00000001]
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vslw v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFFFFFE, FFFFFFFE, FFFFFFFE, FFFFFFFE]
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#_ REGISTER_OUT v4 [00000001, 00000001, 00000001, 00000001]
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test_vslw_3:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [0000001F, 0000001F, 0000001F, 0000001F]
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vslw v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [80000000, 80000000, 80000000, 80000000]
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#_ REGISTER_OUT v4 [0000001F, 0000001F, 0000001F, 0000001F]
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test_vslw_4:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00000020, 00000020, 00000020, 00000020]
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vslw v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_OUT v4 [00000020, 00000020, 00000020, 00000020]
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test_vslw_5:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00000009, 00000009, 00000009, 00000009]
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vslw v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFFFE00, FFFFFE00, FFFFFE00, FFFFFE00]
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#_ REGISTER_OUT v4 [00000009, 00000009, 00000009, 00000009]
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test_vslw_6:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00000021, 00000021, 00000021, 00000021]
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vslw v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFFFFFE, FFFFFFFE, FFFFFFFE, FFFFFFFE]
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#_ REGISTER_OUT v4 [00000021, 00000021, 00000021, 00000021]
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