39745 lines
1.2 MiB
39745 lines
1.2 MiB
test_fnmadds_1_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_1_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_2_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
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|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_2_cr_GEN:
|
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#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
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|
#_ REGISTER_OUT f4 0x8000000000000000
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|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_3_GEN:
|
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#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
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|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_3_cr_GEN:
|
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#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
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#_ REGISTER_IN f3 0x0000000000000001
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|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
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#_ REGISTER_OUT f4 0x7FF8000000000000
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#_ REGISTER_OUT cr 0x00000000
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|
|
|
test_fnmadds_4_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
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#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
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fnmadds f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
|
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#_ REGISTER_OUT f2 0x0000000000000000
|
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#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
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#_ REGISTER_OUT f4 0x7FF8000000000000
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|
|
|
test_fnmadds_4_cr_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
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#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
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|
fnmadds. f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
|
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#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
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#_ REGISTER_OUT f4 0x7FF8000000000000
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#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_5_GEN:
|
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#_ REGISTER_IN f1 0x0000000000000000
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|
#_ REGISTER_IN f2 0x0000000000000000
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|
#_ REGISTER_IN f3 0x3FF0000000000000
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|
fnmadds f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
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#_ REGISTER_OUT f4 0xBFF0000000000000
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|
|
|
test_fnmadds_5_cr_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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|
#_ REGISTER_IN f2 0x0000000000000000
|
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#_ REGISTER_IN f3 0x3FF0000000000000
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fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
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#_ REGISTER_OUT f4 0xBFF0000000000000
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#_ REGISTER_OUT cr 0x00000000
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|
|
|
test_fnmadds_6_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0xBFF0000000000000
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fnmadds f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
|
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#_ REGISTER_OUT f3 0xBFF0000000000000
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#_ REGISTER_OUT f4 0x3FF0000000000000
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|
|
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test_fnmadds_6_cr_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
|
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#_ REGISTER_IN f3 0xBFF0000000000000
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fnmadds. f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0xBFF0000000000000
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#_ REGISTER_OUT f4 0x3FF0000000000000
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#_ REGISTER_OUT cr 0x00000000
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|
|
|
test_fnmadds_7_GEN:
|
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0xC1E0000000000000
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fnmadds f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0xC1E0000000000000
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#_ REGISTER_OUT f4 0x41E0000000000000
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|
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test_fnmadds_7_cr_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0xC1E0000000000000
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fnmadds. f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
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#_ REGISTER_OUT f4 0x41E0000000000000
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#_ REGISTER_OUT cr 0x00000000
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|
|
|
test_fnmadds_8_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0x41DFFFFFFFC00000
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fnmadds f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
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#_ REGISTER_OUT f4 0xC1E0000000000000
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|
|
|
test_fnmadds_8_cr_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0x41DFFFFFFFC00000
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fnmadds. f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
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#_ REGISTER_OUT f4 0xC1E0000000000000
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#_ REGISTER_OUT cr 0x08000000
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|
|
|
test_fnmadds_9_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0x7FF0000000000000
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fnmadds f4, f1, f2, f3
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|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0x7FF0000000000000
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#_ REGISTER_OUT f4 0xFFF0000000000000
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|
|
|
test_fnmadds_9_cr_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0x7FF0000000000000
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fnmadds. f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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|
#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0x7FF0000000000000
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#_ REGISTER_OUT f4 0xFFF0000000000000
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#_ REGISTER_OUT cr 0x00000000
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|
|
|
test_fnmadds_10_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0xFFF0000000000000
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fnmadds f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0xFFF0000000000000
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#_ REGISTER_OUT f4 0x7FF0000000000000
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|
|
|
test_fnmadds_10_cr_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0xFFF0000000000000
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fnmadds. f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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|
#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0xFFF0000000000000
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#_ REGISTER_OUT f4 0x7FF0000000000000
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#_ REGISTER_OUT cr 0x00000000
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|
|
|
test_fnmadds_11_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0xFFF8000000000000
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fnmadds f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0xFFF8000000000000
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#_ REGISTER_OUT f4 0xFFF8000000000000
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|
|
|
test_fnmadds_11_cr_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
|
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#_ REGISTER_IN f2 0x0000000000000000
|
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#_ REGISTER_IN f3 0xFFF8000000000000
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|
fnmadds. f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0xFFF8000000000000
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#_ REGISTER_OUT f4 0xFFF8000000000000
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#_ REGISTER_OUT cr 0x00000000
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|
|
|
test_fnmadds_12_GEN:
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#_ REGISTER_IN f1 0x0000000000000000
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#_ REGISTER_IN f2 0x0000000000000000
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#_ REGISTER_IN f3 0xFFF4000000000000
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fnmadds f4, f1, f2, f3
|
|
blr
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#_ REGISTER_OUT f1 0x0000000000000000
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#_ REGISTER_OUT f2 0x0000000000000000
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#_ REGISTER_OUT f3 0xFFF4000000000000
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#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_12_cr_GEN:
|
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#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
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#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
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#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
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#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_13_GEN:
|
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#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
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|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_13_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_14_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_14_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_15_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_15_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_16_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_16_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_17_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_17_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_18_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_18_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_19_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_19_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_20_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_20_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_21_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_21_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_22_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_22_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_23_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_23_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_24_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_24_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_25_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_25_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_26_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_26_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_27_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_27_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_28_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_28_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_29_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_29_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_30_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_30_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_31_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_31_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_32_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_32_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_33_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_33_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_34_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_34_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_35_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_35_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_36_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_36_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_37_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_37_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_38_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_38_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_39_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_39_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_40_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_40_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_41_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_41_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_42_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_42_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_43_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_43_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_44_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_44_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_45_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_45_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_46_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_46_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_47_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_47_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_48_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_48_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_49_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_49_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_50_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_50_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_51_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_51_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_52_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_52_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_53_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_53_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_54_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_54_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_55_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_55_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_56_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_56_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_57_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_57_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_58_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_58_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_59_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_59_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_60_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_60_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_61_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_61_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_62_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_62_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_63_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_63_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_64_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_64_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_65_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_65_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_66_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_66_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_67_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_67_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_68_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_68_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_69_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_69_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_70_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_70_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_71_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_71_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_72_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_72_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_73_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_73_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_74_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_74_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_75_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_75_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_76_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_76_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_77_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_77_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_78_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_78_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_79_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_79_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_80_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_80_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_81_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_81_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_82_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_82_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_83_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_83_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_84_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_84_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_85_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_85_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_86_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_86_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_87_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_87_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_88_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_88_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_89_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_89_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_90_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_90_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_91_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_91_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_92_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_92_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_93_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_93_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_94_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_94_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_95_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_95_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_96_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_96_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_97_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_97_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_98_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_98_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_99_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_99_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_100_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_100_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_101_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_101_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_102_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_102_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_103_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_103_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_104_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_104_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_105_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_105_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_106_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_106_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_107_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_107_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_108_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_108_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_109_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_109_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_110_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_110_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_111_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_111_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_112_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_112_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_113_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_113_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_114_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_114_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_115_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_115_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_116_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_116_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_117_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_117_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_118_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_118_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_119_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_119_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_120_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_120_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_121_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_121_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_122_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_122_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_123_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_123_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_124_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_124_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_125_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_125_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_126_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_126_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_127_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_127_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_128_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_128_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_129_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_129_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_130_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_130_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_131_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_131_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_132_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_132_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_133_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_133_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_134_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_134_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_135_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_135_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_136_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_136_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_137_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_137_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_138_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_138_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_139_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_139_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_140_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_140_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_141_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_141_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_142_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_142_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_143_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_143_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_144_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_144_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_145_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_145_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_146_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_146_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_147_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_147_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_148_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_148_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_149_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_149_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_150_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_150_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_151_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_151_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_152_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_152_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_153_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_153_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_154_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_154_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_155_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_155_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_156_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_156_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_157_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_157_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_158_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_158_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_159_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_159_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_160_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_160_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_161_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_161_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_162_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_162_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_163_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_163_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_164_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_164_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_165_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_165_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_166_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_166_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_167_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_167_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_168_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_168_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_169_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_169_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_170_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_170_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_171_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_171_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_172_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_172_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_173_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_173_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_174_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_174_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_175_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_175_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_176_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_176_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_177_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_177_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_178_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_178_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_179_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_179_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_180_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_180_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_181_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_181_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_182_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_182_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_183_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_183_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_184_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_184_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_185_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_185_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_186_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_186_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_187_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_187_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_188_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_188_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_189_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_189_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_190_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_190_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_191_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_191_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_192_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_192_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_193_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_193_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_194_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_194_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_195_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_195_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_196_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_196_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_197_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_197_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_198_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_198_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_199_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_199_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_200_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_200_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_201_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_201_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_202_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_202_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_203_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_203_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_204_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_204_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_205_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_205_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_206_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_206_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_207_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_207_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_208_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_208_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_209_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_209_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_210_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_210_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_211_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_211_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_212_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_212_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_213_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_213_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_214_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_214_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_215_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_215_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_216_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_216_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_217_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_217_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_218_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_218_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_219_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_219_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_220_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_220_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_221_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_221_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_222_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_222_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_223_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_223_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_224_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_224_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_225_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_225_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_226_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_226_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_227_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_227_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_228_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_228_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_229_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_229_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_230_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_230_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_231_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_231_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_232_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_232_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_233_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_233_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_234_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_234_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_235_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_235_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_236_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_236_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_237_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_237_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_238_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_238_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_239_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_239_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_240_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_240_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_241_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_241_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_242_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_242_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_243_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_243_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_244_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_244_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_245_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_245_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_246_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_246_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_247_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_247_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_248_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_248_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_249_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_249_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_250_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_250_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_251_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_251_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_252_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_252_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_253_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_253_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_254_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_254_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_255_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_255_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_256_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_256_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_257_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_257_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_258_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_258_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_259_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_259_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_260_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_260_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_261_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_261_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_262_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_262_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_263_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_263_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_264_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_264_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_265_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_265_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_266_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_266_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_267_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_267_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_268_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_268_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_269_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_269_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_270_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_270_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_271_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_271_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_272_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_272_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_273_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_273_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_274_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_274_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_275_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_275_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_276_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_276_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_277_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_277_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_278_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_278_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_279_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_279_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_280_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_280_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_281_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_281_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_282_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_282_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_283_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_283_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_284_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_284_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_285_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_285_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_286_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_286_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_287_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_287_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_288_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_288_cr_GEN:
|
|
#_ REGISTER_IN f1 0x8000000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x8000000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_289_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_289_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_290_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_290_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_291_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_291_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_292_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_292_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_293_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_293_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_294_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_294_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_295_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_295_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_296_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_296_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_297_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_297_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_298_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_298_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_299_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_299_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_300_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_300_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_301_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_301_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_302_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_302_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_303_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_303_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_304_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_304_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_305_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_305_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_306_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_306_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_307_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_307_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_308_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_308_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_309_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_309_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_310_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_310_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_311_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_311_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_312_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_312_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_313_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_313_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_314_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_314_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_315_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_315_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_316_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_316_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_317_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_317_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_318_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_318_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_319_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_319_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_320_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_320_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_321_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_321_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_322_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_322_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_323_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_323_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_324_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_324_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_325_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_325_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_326_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_326_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_327_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_327_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_328_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_328_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_329_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_329_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_330_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_330_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_331_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_331_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_332_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_332_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_333_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_333_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_334_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_334_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_335_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_335_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_336_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_336_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_337_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_337_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_338_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_338_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_339_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_339_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_340_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_340_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_341_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_341_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_342_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_342_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_343_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_343_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_344_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_344_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_345_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_345_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_346_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_346_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_347_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_347_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_348_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_348_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_349_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_349_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_350_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_350_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_351_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_351_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_352_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_352_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_353_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_353_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_354_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_354_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_355_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_355_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_356_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_356_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_357_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_357_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_358_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_358_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_359_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_359_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_360_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_360_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_361_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_361_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_362_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_362_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_363_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_363_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_364_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_364_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_365_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_365_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_366_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_366_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_367_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_367_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_368_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_368_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_369_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_369_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_370_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_370_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_371_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_371_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_372_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_372_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_373_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_373_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_374_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_374_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_375_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_375_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_376_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_376_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_377_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_377_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_378_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_378_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_379_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_379_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_380_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_380_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_381_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_381_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_382_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_382_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_383_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_383_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_384_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_384_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_385_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_385_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_386_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_386_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_387_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_387_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_388_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_388_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_389_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_389_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_390_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_390_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_391_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_391_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_392_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_392_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_393_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_393_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_394_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_394_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_395_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_395_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_396_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_396_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_397_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_397_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_398_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_398_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_399_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_399_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_400_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_400_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_401_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_401_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_402_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_402_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_403_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_403_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_404_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_404_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_405_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_405_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_406_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_406_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_407_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_407_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_408_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_408_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_409_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_409_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_410_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_410_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_411_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_411_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_412_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_412_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_413_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_413_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_414_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_414_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_415_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_415_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_416_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_416_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_417_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_417_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_418_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_418_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_419_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_419_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_420_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_420_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_421_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_421_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_422_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_422_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_423_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_423_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_424_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_424_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_425_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_425_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_426_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_426_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_427_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_427_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_428_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_428_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_429_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_429_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_430_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_430_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_431_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_431_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_432_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_432_cr_GEN:
|
|
#_ REGISTER_IN f1 0x0000000000000001
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x0000000000000001
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_433_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_433_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_434_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_434_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_435_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_435_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_436_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_436_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_437_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_437_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_438_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_438_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_439_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_439_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_440_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_440_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_441_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_441_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_442_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_442_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_443_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_443_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_444_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_444_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_445_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_445_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_446_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_446_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_447_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_447_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_448_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_448_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_449_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_449_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_450_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_450_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_451_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_451_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_452_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_452_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_453_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_453_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_454_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_454_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_455_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_455_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_456_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_456_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_457_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_457_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_458_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_458_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_459_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_459_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_460_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_460_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_461_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_461_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_462_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_462_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_463_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_463_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_464_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_464_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_465_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_465_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_466_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_466_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_467_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_467_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_468_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_468_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_469_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_469_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_470_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_470_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_471_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_471_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_472_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_472_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_473_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_473_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_474_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_474_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_475_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_475_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_476_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_476_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_477_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_477_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_478_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_478_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_479_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_479_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_480_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_480_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_481_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_481_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_482_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_482_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_483_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_483_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_484_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_484_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_485_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_485_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_486_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_486_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_487_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_487_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_488_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_488_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_489_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_489_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_490_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_490_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_491_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_491_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_492_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_492_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_493_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_493_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_494_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_494_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_495_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_495_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_496_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_496_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_497_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_497_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_498_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_498_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_499_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_499_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_500_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_500_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_501_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_501_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_502_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_502_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_503_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_503_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_504_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_504_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_505_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_505_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_506_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_506_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_507_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_507_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_508_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_508_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_509_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_509_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_510_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_510_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_511_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_511_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_512_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_512_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_513_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_513_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_514_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_514_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_515_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_515_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_516_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_516_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_517_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_517_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_518_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_518_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_519_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_519_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_520_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_520_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_521_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_521_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_522_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_522_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_523_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_523_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_524_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_524_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_525_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_525_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_526_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_526_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_527_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_527_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_528_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_528_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_529_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_529_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_530_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_530_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_531_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_531_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_532_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_532_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_533_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_533_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_534_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_534_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_535_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_535_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_536_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_536_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_537_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_537_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_538_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_538_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_539_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_539_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_540_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_540_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_541_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_541_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_542_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_542_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_543_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_543_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_544_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_544_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_545_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_545_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_546_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_546_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_547_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_547_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_548_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_548_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_549_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_549_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_550_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_550_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_551_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_551_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_552_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_552_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_553_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_553_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_554_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_554_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_555_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_555_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_556_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_556_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_557_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_557_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_558_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_558_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_559_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_559_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_560_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_560_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_561_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_561_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_562_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_562_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_563_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_563_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_564_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_564_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_565_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_565_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_566_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_566_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_567_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_567_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_568_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_568_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_569_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_569_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_570_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_570_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_571_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_571_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_572_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_572_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_573_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_573_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_574_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_574_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_575_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_575_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_576_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_576_cr_GEN:
|
|
#_ REGISTER_IN f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_577_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_577_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_578_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_578_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_579_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_579_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_580_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_580_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_581_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_581_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_582_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_582_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_583_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_583_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_584_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_584_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_585_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_585_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_586_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_586_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_587_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_587_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_588_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_588_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_589_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_589_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_590_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_590_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_591_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_591_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_592_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_592_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_593_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_593_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_594_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_594_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_595_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_595_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_596_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_596_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_597_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_597_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_598_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_598_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_599_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_599_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_600_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_600_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_601_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_601_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_602_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_602_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_603_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_603_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_604_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_604_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_605_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_605_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_606_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_606_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_607_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_607_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_608_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_608_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_609_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_609_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_610_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_610_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_611_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_611_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_612_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_612_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_613_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_613_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_614_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_614_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_615_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_615_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_616_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_616_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_617_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_617_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_618_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_618_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_619_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_619_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_620_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_620_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_621_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_621_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_622_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_622_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_623_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_623_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_624_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_624_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_625_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_625_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_626_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_626_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_627_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_627_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_628_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_628_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_629_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC000000000000000
|
|
|
|
test_fnmadds_629_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_630_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_630_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_631_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_631_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_632_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_632_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_633_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_633_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_634_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_634_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_635_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_635_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_636_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_636_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_637_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_637_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_638_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_638_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_639_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_639_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_640_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_640_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_641_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_641_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_642_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x4000000000000000
|
|
|
|
test_fnmadds_642_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x4000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_643_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_643_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_644_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_644_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_645_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_645_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_646_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_646_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_647_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_647_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_648_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_648_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_649_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_649_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_650_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_650_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_651_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_651_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_652_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_652_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_653_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_653_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_654_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_654_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_655_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41F0000000000000
|
|
|
|
test_fnmadds_655_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41F0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_656_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_656_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_657_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_657_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_658_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_658_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_659_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_659_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_660_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_660_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_661_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_661_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_662_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_662_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_663_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_663_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_664_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_664_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_665_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_665_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_666_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_666_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_667_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_667_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_668_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1F0000000000000
|
|
|
|
test_fnmadds_668_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1F0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_669_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_669_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_670_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_670_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_671_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_671_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_672_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_672_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_673_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_673_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_674_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_674_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_675_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_675_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_676_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_676_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_677_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_677_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_678_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_678_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_679_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_679_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_680_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_680_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_681_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_681_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_682_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_682_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_683_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_683_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_684_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_684_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_685_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_685_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_686_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_686_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_687_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_687_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_688_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_688_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_689_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_689_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_690_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_690_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_691_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_691_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_692_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_692_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_693_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_693_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_694_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_694_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_695_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_695_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_696_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_696_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_697_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_697_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_698_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_698_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_699_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_699_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_700_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_700_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_701_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_701_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_702_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_702_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_703_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_703_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_704_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_704_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_705_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_705_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_706_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_706_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_707_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_707_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_708_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_708_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_709_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_709_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_710_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_710_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_711_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_711_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_712_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_712_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_713_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_713_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_714_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_714_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_715_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_715_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_716_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_716_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_717_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_717_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_718_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_718_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_719_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_719_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_720_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_720_cr_GEN:
|
|
#_ REGISTER_IN f1 0x3FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x3FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_721_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_721_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_722_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_722_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_723_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_723_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_724_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_724_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_725_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_725_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_726_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_726_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_727_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_727_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_728_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_728_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_729_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_729_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_730_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_730_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_731_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_731_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_732_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_732_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_733_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_733_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_734_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_734_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_735_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_735_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_736_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_736_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_737_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_737_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_738_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_738_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_739_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_739_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_740_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_740_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_741_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_741_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_742_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_742_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_743_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_743_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_744_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_744_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_745_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_745_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_746_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_746_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_747_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_747_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_748_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_748_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_749_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_749_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_750_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_750_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_751_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_751_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_752_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_752_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_753_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_753_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_754_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_754_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_755_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_755_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_756_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_756_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_757_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_757_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_758_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_758_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_759_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_759_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_760_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_760_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_761_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_761_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_762_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_762_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_763_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_763_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_764_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_764_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_765_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_765_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_766_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_766_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_767_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_767_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_768_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_768_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_769_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_769_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_770_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_770_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_771_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_771_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_772_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_772_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_773_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_773_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_774_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x4000000000000000
|
|
|
|
test_fnmadds_774_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x4000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_775_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_775_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_776_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_776_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_777_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_777_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_778_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_778_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_779_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_779_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_780_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_780_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_781_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_781_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_782_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_782_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_783_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_783_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_784_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_784_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_785_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC000000000000000
|
|
|
|
test_fnmadds_785_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_786_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_786_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_787_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_787_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_788_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_788_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_789_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_789_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_790_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_790_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_791_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_791_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_792_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_792_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_793_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_793_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_794_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_794_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_795_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_795_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_796_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_796_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_797_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_797_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_798_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_798_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_799_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_799_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_800_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1F0000000000000
|
|
|
|
test_fnmadds_800_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1F0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_801_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_801_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_802_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_802_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_803_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_803_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_804_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_804_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_805_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_805_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_806_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_806_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_807_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_807_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_808_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_808_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_809_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_809_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_810_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_810_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_811_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41F0000000000000
|
|
|
|
test_fnmadds_811_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41F0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_812_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_812_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_813_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_813_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_814_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_814_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_815_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_815_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_816_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_816_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_817_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_817_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_818_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_818_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_819_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_819_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_820_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_820_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_821_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_821_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_822_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_822_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_823_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_823_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_824_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_824_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_825_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_825_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_826_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_826_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_827_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_827_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_828_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_828_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_829_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_829_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_830_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_830_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_831_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_831_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_832_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_832_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_833_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_833_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_834_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_834_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_835_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_835_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_836_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_836_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_837_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_837_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_838_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_838_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_839_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_839_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_840_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_840_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_841_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_841_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_842_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_842_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_843_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_843_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_844_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_844_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_845_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_845_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_846_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_846_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_847_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_847_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_848_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_848_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_849_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_849_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_850_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_850_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_851_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_851_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_852_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_852_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_853_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_853_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_854_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_854_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_855_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_855_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_856_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_856_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_857_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_857_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_858_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_858_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_859_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_859_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_860_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_860_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_861_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_861_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_862_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_862_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_863_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_863_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_864_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_864_cr_GEN:
|
|
#_ REGISTER_IN f1 0xBFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xBFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_865_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_865_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_866_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_866_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_867_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_867_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_868_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_868_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_869_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_869_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_870_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_870_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_871_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_871_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_872_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_872_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_873_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_873_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_874_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_874_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_875_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_875_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_876_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_876_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_877_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_877_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_878_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_878_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_879_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_879_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_880_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_880_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_881_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_881_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_882_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_882_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_883_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_883_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_884_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_884_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_885_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_885_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_886_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_886_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_887_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_887_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_888_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_888_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_889_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_889_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_890_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_890_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_891_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_891_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_892_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_892_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_893_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_893_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_894_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_894_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_895_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_895_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_896_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_896_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_897_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_897_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_898_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_898_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_899_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_899_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_900_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_900_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_901_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_901_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_902_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_902_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_903_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_903_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_904_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_904_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_905_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_905_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_906_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_906_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_907_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_907_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_908_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_908_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_909_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_909_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_910_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_910_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_911_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_911_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_912_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_912_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_913_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_913_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_914_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_914_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_915_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_915_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_916_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_916_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_917_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_917_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_918_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_918_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_919_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41F0000000000000
|
|
|
|
test_fnmadds_919_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41F0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_920_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_920_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_921_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_921_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_922_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_922_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_923_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_923_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_924_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_924_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_925_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_925_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_926_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_926_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_927_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_927_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_928_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_928_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_929_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_929_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_930_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_930_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_931_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_931_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_932_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1F0000000000000
|
|
|
|
test_fnmadds_932_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1F0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_933_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_933_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_934_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_934_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_935_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_935_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_936_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_936_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_937_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_937_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_938_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_938_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_939_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_939_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_940_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_940_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_941_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_941_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_942_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_942_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_943_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_943_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_944_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_944_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_945_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_945_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_946_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_946_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_947_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_947_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_948_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_948_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_949_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_949_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_950_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_950_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_951_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_951_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_952_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_952_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_953_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_953_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_954_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_954_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_955_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_955_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_956_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_956_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_957_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_957_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_958_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_958_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_959_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_959_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_960_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_960_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_961_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_961_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_962_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_962_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_963_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_963_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_964_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_964_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_965_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_965_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_966_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_966_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_967_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_967_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_968_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_968_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_969_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_969_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_970_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_970_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_971_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_971_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_972_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_972_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_973_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_973_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_974_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_974_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_975_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_975_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_976_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_976_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_977_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_977_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_978_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_978_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_979_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_979_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_980_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_980_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_981_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_981_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_982_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_982_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_983_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_983_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_984_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_984_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_985_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_985_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_986_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_986_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_987_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_987_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_988_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_988_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_989_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_989_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_990_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_990_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_991_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_991_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_992_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_992_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_993_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_993_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_994_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_994_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_995_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_995_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_996_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_996_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_997_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_997_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_998_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_998_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_999_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_999_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1000_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1000_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1001_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1001_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1002_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1002_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1003_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1003_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1004_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1004_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1005_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1005_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1006_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1006_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1007_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1007_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1008_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1008_cr_GEN:
|
|
#_ REGISTER_IN f1 0xC1E0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xC1E0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1009_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_1009_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1010_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_1010_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1011_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1011_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1012_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1012_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1013_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_1013_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1014_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_1014_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1015_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_1015_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1016_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_1016_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1017_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1017_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1018_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1018_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1019_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1019_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1020_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1020_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1021_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_1021_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1022_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
|
|
test_fnmadds_1022_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x0000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1023_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1023_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1024_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1024_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1025_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
|
|
test_fnmadds_1025_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xBFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1026_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_1026_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1027_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_1027_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1028_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_1028_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1029_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1029_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1030_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1030_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1031_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1031_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1032_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1032_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1033_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1033_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1034_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1034_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1035_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1035_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1036_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1036_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1037_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1037_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1038_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1038_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1039_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1039_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1040_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1040_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1041_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1041_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1042_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1042_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1043_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1043_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1044_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1044_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1045_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1045_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1046_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1046_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1047_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1047_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1048_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1048_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1049_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1049_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1050_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1050_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1051_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1051_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1052_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1052_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1053_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1053_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1054_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1054_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1055_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1055_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1056_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1056_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1057_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_1057_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1058_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_1058_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1059_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1059_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1060_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1060_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1061_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_1061_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1062_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
|
|
test_fnmadds_1062_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC1E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1063_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
|
|
test_fnmadds_1063_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x3FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1064_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1F0000000000000
|
|
|
|
test_fnmadds_1064_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC1F0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1065_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1065_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1066_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1066_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1067_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1067_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1068_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1068_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1069_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_1069_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1070_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_1070_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1071_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1071_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1072_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1072_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1073_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_1073_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1074_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
|
|
test_fnmadds_1074_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x41E0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1075_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41F0000000000000
|
|
|
|
test_fnmadds_1075_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x41F0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1076_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
|
|
test_fnmadds_1076_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x8000000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1077_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1077_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1078_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1078_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1079_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1079_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1080_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1080_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1081_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_1081_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1082_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_1082_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1083_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1083_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1084_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1084_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1085_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_1085_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1086_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_1086_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1087_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_1087_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1088_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
|
|
test_fnmadds_1088_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x43D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1089_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1089_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1090_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1090_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1091_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1091_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1092_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1092_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1093_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_1093_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1094_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_1094_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1095_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1095_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1096_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1096_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1097_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_1097_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1098_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_1098_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1099_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_1099_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1100_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
|
|
test_fnmadds_1100_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xC3D0000000000000
|
|
#_ REGISTER_OUT cr 0x08000000
|
|
|
|
test_fnmadds_1101_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1101_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1102_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1102_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1103_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1103_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1104_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1104_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1105_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1105_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1106_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1106_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1107_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1107_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1108_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1108_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1109_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1109_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1110_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1110_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1111_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1111_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1112_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1112_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1113_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1113_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1114_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1114_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1115_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1115_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1116_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1116_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1117_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1117_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1118_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1118_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1119_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1119_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1120_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1120_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1121_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1121_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1122_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1122_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1123_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1123_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1124_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1124_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1125_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1125_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1126_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1126_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1127_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1127_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1128_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1128_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1129_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1129_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1130_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1130_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1131_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1131_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1132_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1132_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1133_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1133_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1134_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1134_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1135_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1135_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1136_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1136_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1137_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1137_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1138_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1138_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1139_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1139_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1140_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1140_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1141_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1141_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1142_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1142_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1143_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1143_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1144_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1144_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1145_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1145_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1146_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1146_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1147_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1147_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1148_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1148_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1149_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1149_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1150_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1150_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1151_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1151_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1152_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1152_cr_GEN:
|
|
#_ REGISTER_IN f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1153_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1153_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1154_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1154_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1155_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1155_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1156_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1156_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1157_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1157_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1158_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1158_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1159_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1159_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1160_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1160_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1161_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1161_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1162_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1162_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1163_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1163_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1164_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1164_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1165_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1165_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1166_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1166_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1167_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1167_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1168_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1168_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1169_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1169_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1170_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1170_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1171_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1171_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1172_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1172_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1173_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1173_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1174_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1174_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1175_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1175_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1176_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1176_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1177_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1177_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1178_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1178_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1179_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1179_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1180_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1180_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1181_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1181_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1182_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1182_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1183_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1183_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1184_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1184_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1185_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1185_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1186_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1186_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1187_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1187_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1188_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1188_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1189_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1189_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1190_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1190_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1191_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1191_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1192_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1192_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1193_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1193_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1194_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1194_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1195_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1195_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1196_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1196_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1197_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1197_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1198_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1198_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1199_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1199_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1200_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1200_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1201_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1201_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1202_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1202_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1203_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1203_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1204_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1204_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1205_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1205_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1206_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1206_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1207_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1207_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1208_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1208_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1209_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1209_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1210_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1210_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1211_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1211_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1212_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1212_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1213_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1213_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1214_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1214_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1215_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1215_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1216_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1216_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1217_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1217_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1218_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1218_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1219_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1219_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1220_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1220_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1221_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1221_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1222_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1222_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1223_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1223_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1224_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1224_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1225_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1225_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1226_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1226_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1227_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1227_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1228_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1228_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1229_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1229_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1230_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1230_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1231_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1231_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1232_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1232_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1233_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1233_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1234_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1234_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1235_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1235_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1236_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1236_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1237_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1237_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1238_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1238_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1239_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1239_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1240_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1240_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1241_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1241_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1242_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1242_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1243_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1243_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1244_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1244_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1245_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1245_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1246_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1246_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1247_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1247_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1248_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1248_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1249_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1249_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1250_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1250_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1251_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1251_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1252_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1252_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1253_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1253_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1254_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1254_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1255_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1255_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1256_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1256_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1257_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1257_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1258_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1258_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1259_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1259_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1260_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1260_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1261_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1261_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1262_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1262_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1263_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1263_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1264_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1264_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1265_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1265_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1266_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1266_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1267_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1267_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1268_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1268_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1269_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1269_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1270_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1270_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1271_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1271_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1272_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1272_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1273_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1273_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1274_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1274_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1275_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1275_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1276_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1276_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1277_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1277_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1278_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1278_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1279_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1279_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1280_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1280_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1281_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1281_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1282_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1282_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1283_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1283_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1284_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1284_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1285_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1285_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1286_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1286_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1287_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1287_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1288_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1288_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1289_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1289_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1290_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1290_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1291_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1291_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1292_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1292_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1293_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1293_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1294_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1294_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1295_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1295_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1296_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1296_cr_GEN:
|
|
#_ REGISTER_IN f1 0x7FF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0x7FF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1297_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1297_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1298_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1298_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1299_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1299_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1300_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1300_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1301_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1301_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1302_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1302_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1303_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1303_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1304_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1304_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1305_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1305_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1306_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1306_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1307_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1307_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1308_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1308_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1309_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1309_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1310_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1310_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1311_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1311_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1312_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1312_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1313_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1313_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1314_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1314_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1315_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1315_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1316_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1316_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1317_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1317_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1318_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1318_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1319_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1319_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1320_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1320_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1321_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1321_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1322_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1322_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1323_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1323_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1324_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1324_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1325_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1325_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1326_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1326_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1327_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1327_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1328_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1328_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1329_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1329_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1330_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1330_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1331_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1331_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1332_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1332_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1333_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1333_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1334_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1334_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1335_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1335_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1336_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1336_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1337_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1337_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1338_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1338_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1339_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1339_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1340_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1340_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1341_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1341_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1342_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1342_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1343_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1343_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1344_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1344_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1345_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1345_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1346_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1346_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1347_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1347_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1348_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1348_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1349_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1349_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1350_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1350_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1351_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1351_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1352_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1352_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1353_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1353_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1354_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1354_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1355_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1355_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1356_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1356_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1357_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1357_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1358_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1358_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1359_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1359_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1360_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1360_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1361_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1361_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1362_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1362_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1363_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1363_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1364_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1364_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1365_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1365_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1366_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1366_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1367_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1367_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1368_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1368_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1369_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1369_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1370_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1370_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1371_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1371_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1372_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1372_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1373_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1373_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1374_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1374_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1375_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1375_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1376_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1376_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1377_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1377_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1378_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1378_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1379_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1379_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1380_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1380_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1381_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1381_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1382_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1382_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1383_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1383_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1384_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1384_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1385_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1385_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1386_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1386_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1387_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1387_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1388_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1388_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1389_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1389_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1390_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1390_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1391_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1391_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1392_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1392_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1393_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1393_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1394_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1394_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1395_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1395_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1396_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1396_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1397_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1397_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1398_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1398_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1399_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1399_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1400_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1400_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1401_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1401_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1402_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
|
|
test_fnmadds_1402_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1403_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1403_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1404_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1404_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1405_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1405_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1406_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1406_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1407_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1407_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1408_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1408_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1409_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1409_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1410_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1410_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1411_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1411_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1412_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1412_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1413_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
|
|
test_fnmadds_1413_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF0000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1414_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
|
|
test_fnmadds_1414_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0x7FF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1415_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1415_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1416_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1416_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1417_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1417_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1418_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1418_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1419_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1419_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1420_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1420_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1421_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1421_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1422_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1422_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1423_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1423_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1424_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1424_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1425_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1425_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1426_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1426_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1427_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1427_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1428_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1428_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1429_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1429_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1430_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1430_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1431_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1431_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1432_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1432_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1433_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1433_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1434_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1434_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1435_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1435_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1436_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1436_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1437_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1437_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1438_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1438_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1439_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1439_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1440_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1440_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF0000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF0000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1441_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1441_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1442_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1442_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1443_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1443_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1444_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1444_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1445_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1445_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1446_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1446_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1447_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1447_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1448_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1448_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1449_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1449_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1450_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1450_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1451_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1451_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1452_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1452_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1453_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1453_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1454_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1454_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1455_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1455_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1456_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1456_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1457_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1457_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1458_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1458_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1459_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1459_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1460_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1460_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1461_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1461_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1462_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1462_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1463_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1463_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1464_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1464_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1465_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1465_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1466_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1466_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1467_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1467_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1468_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1468_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1469_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1469_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1470_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1470_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1471_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1471_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1472_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1472_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1473_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1473_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1474_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1474_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1475_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1475_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1476_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1476_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1477_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1477_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1478_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1478_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1479_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1479_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1480_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1480_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1481_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1481_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1482_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1482_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1483_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1483_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1484_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1484_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1485_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1485_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1486_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1486_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1487_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1487_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1488_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1488_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1489_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1489_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1490_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1490_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1491_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1491_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1492_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1492_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1493_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1493_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1494_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1494_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1495_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1495_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1496_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1496_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1497_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1497_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1498_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1498_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1499_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1499_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1500_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1500_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1501_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1501_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1502_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1502_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1503_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1503_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1504_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1504_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1505_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1505_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1506_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1506_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1507_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1507_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1508_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1508_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1509_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1509_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1510_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1510_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1511_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1511_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1512_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1512_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1513_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1513_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1514_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1514_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1515_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1515_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1516_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1516_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1517_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1517_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1518_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1518_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1519_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1519_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1520_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1520_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1521_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1521_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1522_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1522_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1523_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1523_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1524_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1524_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1525_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1525_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1526_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1526_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1527_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1527_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1528_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1528_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1529_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1529_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1530_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1530_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1531_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1531_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1532_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1532_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1533_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1533_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1534_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1534_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1535_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1535_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1536_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1536_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1537_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1537_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1538_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1538_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1539_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1539_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1540_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1540_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1541_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1541_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1542_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1542_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1543_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1543_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1544_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1544_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1545_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1545_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1546_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1546_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1547_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1547_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1548_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1548_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1549_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1549_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1550_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1550_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1551_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1551_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1552_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1552_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1553_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1553_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1554_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1554_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1555_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1555_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1556_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1556_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1557_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1557_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1558_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1558_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1559_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1559_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1560_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1560_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1561_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1561_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1562_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1562_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1563_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1563_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1564_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1564_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1565_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1565_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1566_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1566_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1567_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1567_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1568_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1568_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1569_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1569_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1570_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1570_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1571_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1571_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x00000000
|
|
|
|
test_fnmadds_1572_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1572_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1573_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1573_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1574_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1574_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1575_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1575_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1576_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1576_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1577_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1577_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1578_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1578_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1579_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1579_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1580_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1580_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1581_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1581_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1582_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1582_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1583_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1583_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1584_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
|
|
test_fnmadds_1584_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF8000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF8000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFF8000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1585_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1585_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1586_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1586_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1587_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1587_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1588_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1588_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1589_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1589_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1590_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1590_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1591_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1591_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1592_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1592_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1593_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1593_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1594_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1594_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1595_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1595_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1596_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1596_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1597_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1597_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1598_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1598_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1599_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1599_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1600_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1600_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1601_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1601_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1602_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1602_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1603_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1603_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1604_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1604_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1605_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1605_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1606_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1606_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1607_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1607_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1608_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1608_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x8000000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x8000000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1609_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1609_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1610_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1610_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1611_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1611_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1612_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1612_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1613_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1613_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1614_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1614_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1615_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1615_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1616_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1616_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1617_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1617_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1618_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1618_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1619_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1619_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1620_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1620_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x0000000000000001
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x0000000000000001
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1621_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1621_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1622_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1622_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1623_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1623_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1624_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1624_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1625_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1625_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1626_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1626_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1627_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1627_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1628_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1628_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1629_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1629_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1630_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1630_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1631_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1631_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1632_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1632_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1633_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1633_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1634_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1634_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1635_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1635_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1636_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1636_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1637_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1637_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1638_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1638_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1639_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1639_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1640_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1640_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1641_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1641_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1642_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1642_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1643_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1643_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1644_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1644_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x3FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x3FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1645_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1645_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1646_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1646_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1647_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1647_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1648_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1648_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1649_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1649_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1650_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1650_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1651_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1651_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1652_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1652_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1653_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1653_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1654_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1654_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1655_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1655_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1656_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1656_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xBFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xBFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1657_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1657_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1658_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1658_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1659_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1659_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1660_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1660_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1661_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1661_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1662_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1662_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1663_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1663_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1664_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1664_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1665_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1665_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1666_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1666_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1667_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1667_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1668_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1668_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xC1E0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xC1E0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1669_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1669_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1670_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1670_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1671_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1671_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1672_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1672_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1673_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1673_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1674_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1674_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1675_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1675_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1676_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1676_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1677_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1677_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1678_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1678_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1679_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1679_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1680_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1680_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1681_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1681_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1682_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1682_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1683_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1683_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1684_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1684_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1685_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1685_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1686_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1686_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1687_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1687_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1688_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1688_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1689_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1689_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1690_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1690_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1691_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1691_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1692_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1692_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0x7FF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0x7FF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1693_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1693_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1694_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1694_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1695_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1695_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1696_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1696_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1697_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1697_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1698_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1698_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1699_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1699_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1700_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1700_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1701_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1701_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1702_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1702_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1703_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1703_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1704_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1704_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF0000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF0000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1705_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1705_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1706_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1706_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1707_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1707_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1708_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1708_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1709_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1709_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1710_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1710_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1711_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1711_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1712_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1712_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1713_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1713_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1714_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1714_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1715_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1715_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1716_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1716_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF8000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF8000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1717_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1717_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1718_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1718_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x8000000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x8000000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1719_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1719_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x0000000000000001
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x0000000000000001
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1720_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1720_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x000FFFFFFFFFFFFF
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x000FFFFFFFFFFFFF
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1721_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1721_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x3FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x3FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1722_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1722_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xBFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xBFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1723_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1723_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xC1E0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xC1E0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1724_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1724_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x41DFFFFFFFC00000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x41DFFFFFFFC00000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1725_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1725_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0x7FF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0x7FF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1726_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1726_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF0000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF0000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1727_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1727_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF8000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF8000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|
|
test_fnmadds_1728_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
|
|
test_fnmadds_1728_cr_GEN:
|
|
#_ REGISTER_IN f1 0xFFF4000000000000
|
|
#_ REGISTER_IN f2 0xFFF4000000000000
|
|
#_ REGISTER_IN f3 0xFFF4000000000000
|
|
fnmadds. f4, f1, f2, f3
|
|
blr
|
|
#_ REGISTER_OUT f1 0xFFF4000000000000
|
|
#_ REGISTER_OUT f2 0xFFF4000000000000
|
|
#_ REGISTER_OUT f3 0xFFF4000000000000
|
|
#_ REGISTER_OUT f4 0xFFFC000000000000
|
|
#_ REGISTER_OUT cr 0x0A000000
|
|
|