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Xenia-Canary/src/xenia/cpu/ppc/testing/instr__gen_vcmpgtuh.s
Dr. Chat 54582cc823 Generated tests from Rick
2019-04-04 18:13:11 -05:00

12351 lines
480 KiB
ArmAsm
Raw Blame History

test_vcmpgtuh_1_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_1_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_2_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_2_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_3_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_3_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_4_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_4_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_5_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_5_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_6_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_6_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_7_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_7_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_8_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_8_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_9_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_9_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_10_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_10_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_11_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_11_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_12_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_12_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_13_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_13_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_14_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_14_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_15_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_15_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_16_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_16_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_17_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_17_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_18_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_18_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_19_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_19_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_20_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_20_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_21_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_21_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_22_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_22_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_23_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_23_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_24_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_24_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_25_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_25_cr_GEN:
#_ REGISTER_IN v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_26_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_26_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_27_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_27_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_28_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_28_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_29_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_29_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_30_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_30_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_31_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_31_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_32_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_32_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_33_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_33_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_34_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_34_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_35_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_35_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_36_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_36_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_37_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_37_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_38_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_38_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_39_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_39_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_40_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_40_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_41_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_41_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_42_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_42_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_43_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_43_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_44_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_44_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_45_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_45_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_46_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_46_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_47_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_47_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_48_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 0000FFFF]
test_vcmpgtuh_48_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_49_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_49_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_50_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_50_cr_GEN:
#_ REGISTER_IN v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_51_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_51_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_52_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_52_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_53_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_53_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_54_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_54_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_55_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_55_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_56_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, 00000000]
test_vcmpgtuh_56_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_57_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_57_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_58_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_58_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_59_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_59_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_60_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_60_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_61_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_61_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_62_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_62_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_63_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_63_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_64_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_64_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_65_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_65_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_66_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_66_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_67_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_67_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_68_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_68_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_69_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_69_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_70_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_70_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_71_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_71_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_72_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_72_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_73_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_73_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_74_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_74_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_75_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_75_cr_GEN:
#_ REGISTER_IN v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_76_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_76_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_77_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_77_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_78_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_78_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_79_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_79_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_80_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_80_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_81_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_81_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_82_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_82_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_83_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_83_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_84_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_84_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_85_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_85_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_86_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_86_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_87_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_87_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_88_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_88_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_89_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_89_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_90_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_90_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_91_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_91_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_92_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_92_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_93_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_93_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_94_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_94_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_95_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_95_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_96_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_96_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_97_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_97_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_98_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_98_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_99_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_99_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_100_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_100_cr_GEN:
#_ REGISTER_IN v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_101_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_101_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_102_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_102_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_103_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_103_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_104_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
test_vcmpgtuh_104_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_105_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_105_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_106_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, 00000000]
test_vcmpgtuh_106_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_107_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_107_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_108_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_108_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_109_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_109_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_110_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_110_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_111_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_111_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_112_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_112_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_113_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_113_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_114_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_114_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_115_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_115_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_116_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_116_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_117_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_117_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_118_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_118_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_119_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_119_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_120_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_120_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_121_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_121_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_122_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_122_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_123_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_123_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_124_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_124_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_125_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_125_cr_GEN:
#_ REGISTER_IN v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_126_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_126_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_127_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_127_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_128_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_128_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_129_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_129_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_130_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_130_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_131_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_131_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_132_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_132_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_133_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_133_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_134_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_134_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_135_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_135_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_136_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_136_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_137_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFF0000, FFFFFFFF]
test_vcmpgtuh_137_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFF0000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_138_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_138_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_139_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_139_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_140_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_140_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_141_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_141_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_142_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_142_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_143_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_143_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_144_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_144_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_145_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_145_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_146_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_146_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_147_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_147_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_148_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_148_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_149_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_149_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_150_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_150_cr_GEN:
#_ REGISTER_IN v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_151_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_151_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_152_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_152_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_153_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_153_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_154_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_154_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_155_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_155_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_156_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_156_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_157_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_157_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_158_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_158_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_159_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_159_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_160_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_160_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_161_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_161_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_162_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_162_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_163_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_163_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_164_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_164_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_165_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_165_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_166_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_166_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_167_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_167_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_168_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_168_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_169_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_169_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_170_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_170_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_171_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_171_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_172_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_172_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_173_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_173_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_174_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_174_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_175_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_175_cr_GEN:
#_ REGISTER_IN v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_176_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_176_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_177_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_177_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_178_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_178_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_179_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, 00000000, 00000000]
test_vcmpgtuh_179_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_180_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_180_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_181_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
test_vcmpgtuh_181_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_182_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_182_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_183_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_183_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_184_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_184_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_185_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_185_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_186_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_186_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_187_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_187_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_188_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_188_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_189_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, 00000000]
test_vcmpgtuh_189_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_190_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_190_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_191_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_191_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_192_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_192_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_193_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_193_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_194_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_194_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_195_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_195_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_196_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_196_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_197_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_197_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_198_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_198_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_199_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_199_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_200_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_200_cr_GEN:
#_ REGISTER_IN v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_201_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_201_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_202_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_202_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_203_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_203_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_204_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_204_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_205_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_205_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_206_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
test_vcmpgtuh_206_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_207_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_207_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_208_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_208_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_209_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_209_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_210_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_210_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_211_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_211_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_212_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_212_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_213_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_213_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_214_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_214_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_215_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_215_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_216_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_216_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_217_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_217_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_218_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_218_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_219_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_219_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_220_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_220_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_221_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_221_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_222_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_222_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_223_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_223_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_224_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_224_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_225_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_225_cr_GEN:
#_ REGISTER_IN v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_226_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_226_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_227_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_227_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_228_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_228_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_229_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_229_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_230_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_230_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_231_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
test_vcmpgtuh_231_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_232_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_232_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_233_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_233_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_234_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_234_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_235_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_235_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_236_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_236_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_237_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_237_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_238_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_238_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_239_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_239_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_240_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_240_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_241_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_241_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_242_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_242_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_243_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_243_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_244_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_244_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_245_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_245_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_246_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_246_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_247_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_247_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_248_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_248_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_249_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_249_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_250_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_250_cr_GEN:
#_ REGISTER_IN v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_251_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_251_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_252_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_252_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_253_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_253_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_254_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_254_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_255_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_255_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_256_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
test_vcmpgtuh_256_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_257_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_257_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_258_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_258_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_259_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_259_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_260_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_260_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_261_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_261_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_262_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_262_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_263_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_263_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_264_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_264_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_265_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_265_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_266_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_266_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_267_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_267_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_268_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_268_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_269_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_269_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_270_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_270_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_271_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_271_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_272_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_272_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_273_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_273_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_274_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_274_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_275_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_275_cr_GEN:
#_ REGISTER_IN v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_276_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_276_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_277_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_277_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_278_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_278_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_279_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_279_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_280_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_280_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_281_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, 00000000, 00000000]
test_vcmpgtuh_281_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_282_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_282_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_283_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_283_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_284_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_284_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_285_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_285_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_286_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_286_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_287_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_287_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_288_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_288_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_289_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_289_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_290_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_290_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_291_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 0000FFFF]
test_vcmpgtuh_291_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_292_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_292_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_293_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_293_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_294_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_294_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_295_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_295_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_296_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_296_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_297_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_297_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_298_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_298_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_299_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_299_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_300_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_300_cr_GEN:
#_ REGISTER_IN v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_301_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_301_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_302_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_302_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_303_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_303_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_304_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_304_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_305_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_305_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_306_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 0000FFFF, 00000000]
test_vcmpgtuh_306_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 0000FFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_307_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_307_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_308_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_308_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_309_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_309_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_310_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_310_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_311_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_311_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_312_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_312_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_313_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [00000000, 00000000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_313_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [00000000, 00000000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_314_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_314_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_315_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_315_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_316_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_316_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_317_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [00000000, 00000000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_317_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [00000000, 00000000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_318_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_318_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_319_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_319_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_320_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_320_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_321_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_321_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_322_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_322_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_323_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_323_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_324_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_324_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_325_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_325_cr_GEN:
#_ REGISTER_IN v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_326_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_326_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_327_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_327_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_328_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_328_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_329_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_329_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_330_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_330_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_331_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 00000000, 00000000]
test_vcmpgtuh_331_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_332_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 00000000, 00000000]
test_vcmpgtuh_332_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_333_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_333_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_334_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_334_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_335_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_335_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_336_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_336_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_337_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_337_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_338_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_338_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_339_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_339_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_340_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_340_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_341_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_341_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_342_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_342_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_343_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFF0000]
test_vcmpgtuh_343_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_344_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, FFFF0000]
test_vcmpgtuh_344_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_345_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_345_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_346_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, FFFF0000]
test_vcmpgtuh_346_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_347_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_347_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_348_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_348_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_349_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_349_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_350_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_350_cr_GEN:
#_ REGISTER_IN v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_351_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_351_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_352_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_352_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_353_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_353_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_354_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_354_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_355_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_355_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_356_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
test_vcmpgtuh_356_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_357_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_357_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_358_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_358_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_359_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_359_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_360_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_360_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_361_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_361_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_362_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_362_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_363_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, 00000000]
test_vcmpgtuh_363_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_364_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_364_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_365_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_365_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_366_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_366_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_367_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_367_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_368_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_368_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_369_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_369_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_370_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_370_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_371_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_371_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_372_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_372_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_373_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_373_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_374_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_374_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_375_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_375_cr_GEN:
#_ REGISTER_IN v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_376_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_376_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_377_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_377_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_378_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_378_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_379_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_379_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_380_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_380_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_381_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_381_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_382_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_382_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_383_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_383_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_384_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_384_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_385_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_385_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_386_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_386_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_387_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_387_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_388_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_388_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_389_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_389_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_390_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_390_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_391_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_391_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_392_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_392_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_393_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_393_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_394_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_394_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_395_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_395_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_396_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_396_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_397_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_397_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_398_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_398_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_399_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_399_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_400_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_400_cr_GEN:
#_ REGISTER_IN v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_401_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_401_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_402_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_402_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_403_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_403_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_404_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_404_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_405_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_405_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_406_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, 00000000]
test_vcmpgtuh_406_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_407_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_407_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_408_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_408_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_409_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_409_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_410_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_410_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_411_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_411_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_412_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFF0000]
test_vcmpgtuh_412_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_413_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_413_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_414_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_414_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_415_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_415_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_416_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_416_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_417_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_417_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_418_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_418_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_419_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_419_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_420_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_420_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_421_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_421_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_422_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_422_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_423_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_423_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_424_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_424_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_425_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_425_cr_GEN:
#_ REGISTER_IN v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_426_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_426_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_427_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_427_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_428_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_428_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_429_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_429_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_430_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_430_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_431_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_431_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_432_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 00000000, 00000000]
test_vcmpgtuh_432_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_433_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_433_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_434_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_434_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_435_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_435_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_436_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_436_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_437_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_437_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_438_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_438_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_439_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_439_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_440_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
test_vcmpgtuh_440_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_441_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_441_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_442_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
test_vcmpgtuh_442_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_443_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFF0000]
test_vcmpgtuh_443_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_444_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, FFFF0000]
test_vcmpgtuh_444_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_445_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_445_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_446_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, FFFF0000]
test_vcmpgtuh_446_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_447_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_447_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_448_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFF0000]
test_vcmpgtuh_448_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_449_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
test_vcmpgtuh_449_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_450_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_450_cr_GEN:
#_ REGISTER_IN v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_451_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_451_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_452_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_452_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_453_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_453_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_454_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_454_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_455_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_455_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_456_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_456_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_457_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_457_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_458_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_458_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_459_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_459_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_460_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_460_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_461_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_461_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_462_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_462_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_463_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_463_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_464_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_464_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_465_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_465_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_466_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFF0000, 00000000]
test_vcmpgtuh_466_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_467_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_467_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_468_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_468_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_469_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_469_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_470_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_470_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_471_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_471_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_472_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_472_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_473_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_473_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_474_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_474_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_475_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_475_cr_GEN:
#_ REGISTER_IN v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_476_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_476_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_477_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_477_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_478_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_478_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_479_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_479_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_480_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_480_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_481_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_481_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_482_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_482_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_483_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_483_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_484_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_484_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_485_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_485_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_486_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_486_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_487_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_487_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_488_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_488_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_489_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_489_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_490_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_490_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_491_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_491_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_492_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_492_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_493_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_493_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_494_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_494_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_495_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
test_vcmpgtuh_495_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [00000000, 0000FFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_496_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_496_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_497_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_497_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_498_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_498_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_499_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_499_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_500_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_500_cr_GEN:
#_ REGISTER_IN v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_501_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_501_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_502_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_502_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_503_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_503_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_504_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_504_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_505_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_505_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_506_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_506_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_507_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
test_vcmpgtuh_507_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFF0000, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_508_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_508_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_509_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_509_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_510_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_510_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_511_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_511_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_512_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_512_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_513_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_513_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_514_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_514_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_515_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_515_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_516_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_516_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_517_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_517_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_518_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_518_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_519_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_519_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_520_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_520_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_521_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_521_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [00000000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_522_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_522_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_523_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_523_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_524_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_524_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_525_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_525_cr_GEN:
#_ REGISTER_IN v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_526_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
test_vcmpgtuh_526_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_527_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_527_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_528_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_528_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_529_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_529_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_530_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_530_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_531_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_531_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_532_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_532_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_533_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_533_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_534_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_534_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_535_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_535_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_536_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_536_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_537_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_537_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_538_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_538_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_539_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_539_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_540_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_540_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_541_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_541_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_542_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_542_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_543_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, 0000FFFF]
test_vcmpgtuh_543_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 0000FFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_544_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_544_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_545_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_545_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_546_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_546_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_547_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, 00000000]
test_vcmpgtuh_547_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_548_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_548_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_549_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, FFFF0000]
test_vcmpgtuh_549_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, 00000000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_550_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_550_cr_GEN:
#_ REGISTER_IN v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_551_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_551_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_552_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_552_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_553_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_553_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_554_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_554_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_555_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_555_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_556_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_556_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_557_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, 00000000]
test_vcmpgtuh_557_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_558_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_558_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_559_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_559_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_560_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_560_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_561_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_561_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_562_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_562_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_563_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_563_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_564_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_564_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_565_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_565_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_566_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, 00000000]
test_vcmpgtuh_566_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_567_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_567_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_568_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_568_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_569_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_569_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_570_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_570_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_571_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_571_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_572_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_572_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_573_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_573_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_574_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
test_vcmpgtuh_574_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_575_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_575_cr_GEN:
#_ REGISTER_IN v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_576_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_576_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_577_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_577_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_578_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_578_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_579_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_579_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_580_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_580_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_581_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_581_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_582_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_582_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_583_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_583_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_584_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_584_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_585_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_585_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_586_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_586_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_587_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_587_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_588_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_588_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_589_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_589_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_590_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_590_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_591_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFF0000, 00000000]
test_vcmpgtuh_591_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_592_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_592_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_593_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_593_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_594_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_594_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_595_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_595_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_596_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_596_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_597_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_597_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_598_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_598_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [FFFF0000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_599_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_599_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [00000000, FFFFFFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_600_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_600_cr_GEN:
#_ REGISTER_IN v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_601_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_601_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_602_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_602_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_603_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_603_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_604_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_604_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_605_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_605_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_606_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_606_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_607_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_607_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_608_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_608_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_609_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_609_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_610_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_610_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_611_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_611_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_612_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_612_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_613_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_613_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_614_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_614_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_615_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_615_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_616_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, 00000000]
test_vcmpgtuh_616_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFF0000, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_617_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
test_vcmpgtuh_617_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_618_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_618_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_619_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_619_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_620_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_620_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_621_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_621_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_622_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_622_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [FFFF0000, 00000000, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_623_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
test_vcmpgtuh_623_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [FFFFFFFF, 00000000, FFFFFFFF, 00000000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_624_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
test_vcmpgtuh_624_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, 00000000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_625_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
test_vcmpgtuh_625_cr_GEN:
#_ REGISTER_IN v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_IN v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v2 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v3 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT cr 0x00000020
test_vcmpgtuh_626_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_626_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00000000, 00000000, 00000000, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00000000, 00000000, 00000000, 00000000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_627_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_627_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00000001, 00000001, 00000001, 00000001]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00000001, 00000001, 00000001, 00000001]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_628_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_628_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [0000FFFF, FFFF0000, 00000000, FFFF0000]
#_ REGISTER_OUT v3 [FFFF0000, 0000FFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_629_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_629_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00010203, 04050607, 08090A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_630_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_630_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [000D000D, 000D000D, 000D000D, 000D000D]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [000D000D, 000D000D, 000D000D, 000D000D]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_631_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_631_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00112233, 44556677, 8899AABB, CCDDEEFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_632_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 0000FFFF]
test_vcmpgtuh_632_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [00FFFF00, 0000FF00, FF0000FF, FFFF00FF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, 0000FFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_633_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_633_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [04040404, 04040404, 04040404, 04040404]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [04040404, 04040404, 04040404, 04040404]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_634_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_634_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [07070707, 07070707, 07070707, 07070707]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [07070707, 07070707, 07070707, 07070707]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_635_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_635_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [08080808, 08080808, 08080808, 08080808]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [08080808, 08080808, 08080808, 08080808]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_636_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_636_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [12121212, 12121212, 12121212, 12121212]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [12121212, 12121212, 12121212, 12121212]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_637_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_637_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [12345678, 87654321, 11223344, 55667788]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [12345678, 87654321, 11223344, 55667788]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_638_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_638_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [3F800000, 3FC00000, 3F8CCCCD, 3FF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_639_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_639_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [41200000, C1200000, 41700000, C1700000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [41200000, C1200000, 41700000, C1700000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_640_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_640_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [7F800203, 04050607, 7F800A0B, 0C0D0E0F]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_641_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFF0000, FFFF0000]
test_vcmpgtuh_641_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [80081010, 808F0000, 7FFFFFFF, 8FFFFFFF]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFF0000, FFFF0000]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_642_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_642_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [BF800000, BFC00000, BF8CCCCD, BFF33333]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_643_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_643_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [C1200000, 41A00000, C1A00000, 41F00000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [C1200000, 41A00000, C1A00000, 41F00000]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_644_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_644_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [CDCDCDCD, CDCDCDCD, CDCDCDCD, 04010203]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_645_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_645_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [F8F9FAFB, FCFDFEFF, 00010203, 04050607]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_646_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_646_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FEFEFEFE, FEFEFEFE, FEFEFEFE, FEFEFEFE]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_647_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_647_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FFFCFFFD, FFFEFFFF, 00000001, 00020003]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFF0000, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_648_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_648_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FFFDFF7E, 00020081, FFFCFF7D, 00030082]
#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000080
test_vcmpgtuh_649_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
test_vcmpgtuh_649_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FFFF0101, 7070FFFF, FFFFFFFF, 00000000]
#_ REGISTER_OUT v3 [0000FFFF, FFFF0000, 00000000, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
test_vcmpgtuh_650_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
test_vcmpgtuh_650_cr_GEN:
#_ REGISTER_IN v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_IN v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
vcmpgtuh. v3, v1, v2
blr
#_ REGISTER_OUT v1 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT v2 [FFFFFF80, 0000007F, FFFEFF7F, 00010080]
#_ REGISTER_OUT v3 [0000FFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
#_ REGISTER_OUT cr 0x00000000
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