91 lines
1.8 KiB
ArmAsm
91 lines
1.8 KiB
ArmAsm
test_andis_cr_1:
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#_ REGISTER_IN r5 0xFFFFFFFFFFFFFFFF
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andis. r11, r5, 0xCAFE
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mfcr r12
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blr
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#_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r11 0xCAFE0000
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#_ REGISTER_OUT r12 0x80000000
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test_andis_cr_1_constant:
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li r5, -1
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andis. r11, r5, 0xCAFE
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mfcr r12
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blr
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#_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r11 0xCAFE0000
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#_ REGISTER_OUT r12 0x80000000
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test_andis_cr_2:
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#_ REGISTER_IN r5 0xFFFFFFFFFFFFFFFF
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andis. r11, r5, 0
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mfcr r12
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blr
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#_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r11 0
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#_ REGISTER_OUT r12 0x20000000
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test_andis_cr_2_constant:
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#_ REGISTER_IN r5 0xFFFFFFFFFFFFFFFF
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andis. r11, r5, 0
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mfcr r12
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blr
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#_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r11 0
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#_ REGISTER_OUT r12 0x20000000
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test_andis_cr_3:
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#_ REGISTER_IN r5 0
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andis. r11, r5, 0xFFFF
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mfcr r12
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blr
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#_ REGISTER_OUT r5 0
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#_ REGISTER_OUT r11 0
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#_ REGISTER_OUT r12 0x20000000
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test_andis_cr_3_constant:
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li r5, 0
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andis. r11, r5, 0xFFFF
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mfcr r12
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blr
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#_ REGISTER_OUT r5 0
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#_ REGISTER_OUT r11 0
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#_ REGISTER_OUT r12 0x20000000
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test_andis_cr_4:
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#_ REGISTER_IN r5 0xFFFFFFFFFFFFFFFF
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andis. r11, r5, 0xCAFE
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mfcr r12
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blr
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#_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r11 0xCAFE0000
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#_ REGISTER_OUT r12 0x80000000
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test_andis_cr_4_constant:
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li r5, -1
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andis. r11, r5, 0xCAFE
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mfcr r12
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blr
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#_ REGISTER_OUT r5 0xFFFFFFFFFFFFFFFF
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#_ REGISTER_OUT r11 0xCAFE0000
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#_ REGISTER_OUT r12 0x80000000
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test_andis_cr_5:
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#_ REGISTER_IN r0 0x100000FF
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andis. r11, r0, 0xFFFF
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mfcr r12
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blr
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#_ REGISTER_OUT r0 0x100000FF
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#_ REGISTER_OUT r11 0x10000000
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#_ REGISTER_OUT r12 0x40000000
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test_andis_cr_5_constant:
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lis r0, 0x1000
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ori r0, r0, 0xFF
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andis. r11, r0, 0xFFFF
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mfcr r12
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blr
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#_ REGISTER_OUT r0 0x100000FF
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#_ REGISTER_OUT r11 0x10000000
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#_ REGISTER_OUT r12 0x40000000
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