5b0b15676c
The A64 sequence table is populated by registration statics spread across multiple translation units. Keeping the backing map as a global object makes registration depend on cross-TU initialization order and can hit the table before it has been constructed. Move the sequence table behind a function-local static so sequence registration is safe regardless of which unit initializes first.
53 lines
1.5 KiB
C++
53 lines
1.5 KiB
C++
/**
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******************************************************************************
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* Xenia : Xbox 360 Emulator Research Project *
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******************************************************************************
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* Copyright 2026 Ben Vanik. All rights reserved. *
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* Released under the BSD license - see LICENSE in the root for more details. *
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******************************************************************************
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*/
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#ifndef XENIA_CPU_BACKEND_A64_A64_SEQUENCES_H_
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#define XENIA_CPU_BACKEND_A64_A64_SEQUENCES_H_
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#include <unordered_map>
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#include "xenia/cpu/hir/instr.h"
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namespace xe {
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namespace cpu {
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namespace backend {
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namespace a64 {
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class A64Emitter;
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typedef bool (*SequenceSelectFn)(A64Emitter&, const hir::Instr*, uint32_t ikey);
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std::unordered_map<uint32_t, SequenceSelectFn>& SequenceTable();
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template <typename T>
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bool Register() {
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SequenceTable().insert({T::head_key(), T::Select});
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return true;
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}
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template <typename T, typename Tn, typename... Ts>
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static bool Register() {
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bool b = true;
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b = b && Register<T>();
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b = b && Register<Tn, Ts...>();
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return b;
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}
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#define EMITTER_OPCODE_TABLE(name, ...) \
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const auto A64_INSTR_##name = Register<__VA_ARGS__>();
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bool SelectSequence(A64Emitter* e, const hir::Instr* i,
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const hir::Instr** new_tail);
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} // namespace a64
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} // namespace backend
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} // namespace cpu
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} // namespace xe
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#endif // XENIA_CPU_BACKEND_A64_A64_SEQUENCES_H_
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