48 lines
1.7 KiB
ArmAsm
48 lines
1.7 KiB
ArmAsm
test_vslh_1:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00000000, 00000000, 00000000, 00000000]
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vslh v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_OUT v4 [00000000, 00000000, 00000000, 00000000]
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test_vslh_2:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00010001, 00010001, 00010001, 00010001]
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vslh v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFEFFFE, FFFEFFFE, FFFEFFFE, FFFEFFFE]
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#_ REGISTER_OUT v4 [00010001, 00010001, 00010001, 00010001]
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test_vslh_3:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [000F000F, 000F000F, 000F000F, 000F000F]
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vslh v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [80008000, 80008000, 80008000, 80008000]
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#_ REGISTER_OUT v4 [000F000F, 000F000F, 000F000F, 000F000F]
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test_vslh_4:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00100010, 00100010, 00100010, 00100010]
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vslh v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_OUT v4 [00100010, 00100010, 00100010, 00100010]
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test_vslh_5:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00090009, 00090009, 00090009, 00090009]
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vslh v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FE00FE00, FE00FE00, FE00FE00, FE00FE00]
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#_ REGISTER_OUT v4 [00090009, 00090009, 00090009, 00090009]
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test_vslh_6:
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#_ REGISTER_IN v3 [FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF]
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#_ REGISTER_IN v4 [00110011, 00110011, 00110011, 00110011]
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vslh v3, v3, v4
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blr
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#_ REGISTER_OUT v3 [FFFEFFFE, FFFEFFFE, FFFEFFFE, FFFEFFFE]
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#_ REGISTER_OUT v4 [00110011, 00110011, 00110011, 00110011]
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