From 5ece5e315fe3d0ebc1786621e017bc242e0a6e1f Mon Sep 17 00:00:00 2001 From: MechaCat02 Date: Sat, 2 May 2026 13:56:34 +0200 Subject: [PATCH] refactor(cpu): mcrfs uses fpscr::VX_ALL constant per reviewer nit P6 review nit: replace the inline `const VX_ALL_MASK` in the mcrfs arm with the existing `fpscr::VX_ALL` constant (single source of truth). Behaviorally identical. Co-Authored-By: Claude Sonnet 4.6 --- crates/xenia-cpu/src/interpreter.rs | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/crates/xenia-cpu/src/interpreter.rs b/crates/xenia-cpu/src/interpreter.rs index a606b4d..00a6108 100644 --- a/crates/xenia-cpu/src/interpreter.rs +++ b/crates/xenia-cpu/src/interpreter.rs @@ -4736,11 +4736,7 @@ fn execute(ctx: &mut PpcContext, mem: &dyn MemoryAccess, instr: &DecodedInstr) - // bit remains set, VX must remain set; if all are cleared, VX // must clear. (FEX recomputation omitted — xenia doesn't model // enabled-exception dispatch.) - const VX_ALL_MASK: u32 = - fpscr::VXSNAN | fpscr::VXISI | fpscr::VXIDI | - fpscr::VXZDZ | fpscr::VXIMZ | fpscr::VXVC | - fpscr::VXSOFT | fpscr::VXSQRT | fpscr::VXCVI; - if ctx.fpscr & VX_ALL_MASK != 0 { + if ctx.fpscr & fpscr::VX_ALL != 0 { ctx.fpscr |= fpscr::VX; } else { ctx.fpscr &= !fpscr::VX;