xenia-gpu: end-to-end Xenos pipeline (PM4, ucode, EDRAM, resolve)
First real GPU implementation. Ring/PM4 frontend (ring_view,
ring_drain, pm4) drains the command processor; gpu_system owns the
threaded backend (DrainFence RPC + parker/fence helpers from M1) and
the MMIO-mapped register block (mmio_region).
Xenos shader frontend: ucode/{alu,control_flow,fetch,mod}.rs decode
the Xbox 360 microcode, translator.rs lowers it onto the WGSL
xenos_interp interpreter shader (shaders/xenos_interp.wgsl).
shader_metrics.rs counts decode/translate work.
Render state: draw_state, primitive, render_target_cache,
texture_cache, tiled_address (Xenos's swizzled tiled-memory layout),
xenos_constants (register field constants), edram (the 10 MiB EDRAM
model with MSAA), and resolve.rs (TILE_FLUSH copy-out — clear-resolve
plus bitwise-equivalent 32 bpp + 64 bpp paths landed). handle.rs
owns the typed GPU-resource handles the kernel hands out.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This commit is contained in:
@@ -1,21 +1,49 @@
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//! Xenos GPU emulation for xenia-rs.
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//!
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//! Modules:
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//! - [`pm4`]: packet format decoder + Type-3 opcode set.
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//! - [`ring_view`]: ring-buffer bookkeeping (base/size/read/write pointers).
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//! - [`register_file`]: 0x6000-entry register array backing the CP + state.
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//! - [`gpu_system`]: top-level `GpuSystem` + PM4 executor running one packet
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//! per call (see the plan's P2 for the design rationale).
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//!
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//! Legacy module `ring_drain` and `command_processor` are retained while P3+
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//! migrations finish; they will be removed once every caller is on
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//! [`gpu_system::GpuSystem`].
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pub mod command_processor;
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pub mod draw_state;
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pub mod edram;
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pub mod gpu_system;
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pub mod handle;
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pub mod mmio_region;
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pub mod pm4;
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pub mod primitive;
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pub mod register_file;
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pub mod ring_drain;
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pub mod ring_view;
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pub mod render_target_cache;
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pub mod resolve;
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pub mod shader_metrics;
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pub mod shaders;
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pub mod texture_cache;
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pub mod tiled_address;
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pub mod translator;
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pub mod ucode;
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pub mod xenos_constants;
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/// Stub GPU system for initial implementation.
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pub struct GpuSystem {
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pub register_file: register_file::RegisterFile,
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}
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impl GpuSystem {
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pub fn new() -> Self {
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Self {
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register_file: register_file::RegisterFile::new(),
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}
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}
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}
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impl Default for GpuSystem {
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fn default() -> Self {
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Self::new()
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}
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}
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pub use gpu_system::{
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ExecOutcome, GpuBlock, GpuMmio, GpuStats, GpuSystem, InterruptSource, PendingInterrupt,
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ShaderBlob, SwapNotification, WaitCmp,
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};
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pub use handle::{
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DrainReply, GpuBackend, GpuCommand, GpuDigestSnapshot, GpuHandle, GpuWorker,
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shutdown_and_join_with_timeout, spawn_gpu_worker, spawn_noop_worker,
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};
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pub use mmio_region::build_region as build_mmio_region;
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pub use pm4::{
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PacketHeader, PacketKind, PM4_INTERRUPT, PM4_NOP, PM4_XE_SWAP, SWAP_SIGNATURE,
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type3_opcode_name,
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};
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pub use ring_drain::{DrainResult, drain};
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pub use ring_view::RingBufferView;
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