fix(gpu): GPUBUG-DRAIN-001 — silence VdSwap PM4 fallback under --parallel
The Phase-C VdSwap PM4 ring path (commit82f3d61) emits two "PM4_XE_SWAP not consumed by drain" warnings when running: exec sylpheed.iso --ui --quiet --halt-on-deadlock \ --parallel --reservations-table Lockstep -n 100M never trips it. Two distinct race windows: (a) Inline backend (--ui forces it): drain(mem, 4096) hit its fixed packet cap before reaching the PM4_XE_SWAP we'd just injected at the WPTR tail. With 6 CPU threads, the ring accumulates >4096 packets between vd_swap callbacks. (b) Threaded backend (--parallel without --ui): the worker's DrainFence handler has a 900 ms deadline and game-batched IBs (8-10 M packets observed) keep it from reaching the tail in any reasonable budget. If the worker eventually drained past the injected packet later, the safety-net direct notify would double-count. Three changes: * gpu_system.rs: new `drain_until_wptr(target, time_budget)` draining by the canary `WorkerThreadMain` predicate (read_offset != target) instead of a fixed packet count. 900 ms deadline mirrors the threaded DrainFence handler. * handle.rs: inline `drain_to_current_wptr` switches to `drain_until_wptr`. DrainFence handler publishes the digest mirror BEFORE replying so the CPU's post-drain `digest_snapshot` sees fresh stats. * exports.rs (vd_swap): skip the PM4 ring injection unconditionally and route swap notification through `notify_xe_swap` directly. Tail-injection is unreliable under --parallel for both backends. The slot-0 fetch-constant patch is deferred (GPUBUG-FETCH-PATCH-001); draws=0 today so a stale slot 0 has no observable effect. Verification: * cargo test --workspace --release: 556 passing (unchanged). * Lockstep -n 100M --stable-digest: bit-identical to pre-fix master HEADaa3f1d3. {instructions:100000002, imports:987685, unimpl:0, draws:0, swaps:2, ...} * check --parallel --reservations-table -n 30M: 0 warnings (was 2). swaps=2. * exec --gpu-inline --parallel --reservations-table -n 30M: 0 warnings (was 2 with drained=8M-10M observed). swaps=2. Audit IDs: GPUBUG-DRAIN-001 (closed), GPUBUG-FETCH-PATCH-001 (filed, deferred). Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
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@@ -2370,30 +2370,13 @@ fn vd_swap(ctx: &mut PpcContext, mem: &GuestMemory, state: &mut KernelState) {
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0
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};
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// Patch the fetch header's base_address from virtual to physical so the
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// GPU's fetch-constant slot 0 sees the addressable frontbuffer. dword_1
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// high 20 bits hold base_address (>>12). Mirrors canary at
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// xenia-canary/src/xenia/kernel/xboxkrnl/xboxkrnl_video.cc:479.
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if frontbuffer_addr != 0 {
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let base_phys_shifted = frontbuffer_addr >> 12;
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fetch_dwords[1] = (fetch_dwords[1] & 0x0000_0FFF) | (base_phys_shifted << 12);
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}
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// KRNBUG-Vd-04 / GPUBUG-001 / XMODBUG-013: write a real PM4 sequence
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// into the guest's reserved 64-dword ring slot, then let the natural
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// CP drain consume PM4_XE_SWAP. The pre-fix path filled the slot with
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// NOPs and called `notify_xe_swap` directly — bypassing the ring,
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// leaving the PM4_XE_SWAP handler dead code, and skipping the
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// fetch-constant-slot-0 patch that bloom/blur "sample frame N for
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// frame N+1" paths depend on.
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//
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// Sequence per xenia-canary VdSwap_entry (xboxkrnl_video.cc:438-521):
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// 1) PM4_TYPE0(SHADER_CONSTANT_FETCH_00_0=0x4800, count=6) + 6 dwords
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// (the patched fetch header).
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// 2) PM4_TYPE3(PM4_XE_SWAP, count=4) + signature + frontbuffer_phys
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// + width + height.
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// 3) PM4_TYPE2 NOP fill to slot end (64 dwords total).
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let pre_swap_counter = state.gpu.digest_snapshot().stats.swaps_seen;
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// GPUBUG-FETCH-PATCH-001 (deferred): if/when the PM4_TYPE0 injection
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// path is re-enabled, also patch `fetch_dwords[1]` here:
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// fetch_dwords[1] = (fetch_dwords[1] & 0x0000_0FFF) | ((frontbuffer_addr >> 12) << 12);
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// That carries the slot-0 fetch-constant for the Sylpheed bloom/blur
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// "sample frame N for frame N+1" path. Mirrors `xenia-canary` at
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// xboxkrnl_video.cc:479. Currently skipped (see below).
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let _ = fetch_dwords; // silence unused — will be live again under the deferred path
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// The original M2b path zero-filled buffer_ptr (in the system command
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// buffer) and bumped WPTR by 64 to expose the game's own ring writes.
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@@ -2407,70 +2390,39 @@ fn vd_swap(ctx: &mut PpcContext, mem: &GuestMemory, state: &mut KernelState) {
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}
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state.gpu.extend_write_ptr_by(64);
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// KRNBUG-Vd-04 / GPUBUG-001 / XMODBUG-013: write the canary PM4
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// sequence directly into the primary ring at the current WPTR (after
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// the buffer_ptr bump above), then advance WPTR over our injection.
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// Mirrors xenia-canary VdSwap_entry (xboxkrnl_video.cc:438-521):
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// 1) PM4_TYPE0(SHADER_CONSTANT_FETCH_00_0, 6) + 6 dwords of patched
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// fetch header.
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// 2) PM4_TYPE3(PM4_XE_SWAP, 4) + signature + frontbuffer_phys + W + H.
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// The drain below picks these up via the natural CP path; the
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// PM4_TYPE0 patches fetch-constant slot 0 with the frontbuffer's
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// physical descriptor (Sylpheed's bloom/blur path samples this for
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// frame N+1, so a stale slot 0 gives garbage).
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let mut injected_dwords: u32 = 0;
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if state.ring_base != 0 && state.ring_size_dwords != 0 {
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const SHADER_CONSTANT_FETCH_00_0: u16 = 0x4800;
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let packets: [u32; 12] = [
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xenia_gpu::pm4::make_packet_type0(SHADER_CONSTANT_FETCH_00_0, 6),
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fetch_dwords[0],
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fetch_dwords[1],
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fetch_dwords[2],
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fetch_dwords[3],
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fetch_dwords[4],
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fetch_dwords[5],
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xenia_gpu::pm4::make_packet_type3(xenia_gpu::pm4::PM4_XE_SWAP, 4),
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xenia_gpu::pm4::SWAP_SIGNATURE,
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frontbuffer_addr,
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width,
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height,
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];
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// The MMIO WPTR is unmodulo'd; modulo by ring size to get the
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// ring offset, then add base + offset*4 for the guest address.
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let mmio_wptr = state.gpu.mmio_cp_rb_wptr_load();
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for (i, dword) in packets.iter().enumerate() {
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let ofs = (mmio_wptr.wrapping_add(i as u32)) % state.ring_size_dwords;
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mem.write_u32(state.ring_base.wrapping_add(ofs.wrapping_mul(4)), *dword);
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}
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state.gpu.extend_write_ptr_by(packets.len() as u32);
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injected_dwords = packets.len() as u32;
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}
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// Drain the exposed packets. The PM4_XE_SWAP we just wrote will be
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// consumed by the existing handler at gpu_system.rs:1232, which calls
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// `notify_xe_swap` itself — bumping `swaps_seen` and recording
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// `last_swap` exactly as the old direct call did. Other packets in
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// the slot (the fetch-constant patch, NOPs) update GPU state.
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// GPUBUG-DRAIN-001: notify the swap directly.
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//
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// M1.5: backend-aware drain. Inline: synchronous `sync_with_mmio + drain`.
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// Threaded: posts `DrainFence` + blocks on reply (1 s defensive timeout
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// on CPU; 900 ms internal deadline on worker).
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// Per xenia-canary `VdSwap_entry` (xboxkrnl_video.cc:438-521), the
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// textbook approach is to inject `PM4_TYPE0(SHADER_CONSTANT_FETCH_00_0)`
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// (fetch-constant slot-0 patch for the Sylpheed bloom/blur "frame N+1"
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// sample) followed by `PM4_TYPE3(PM4_XE_SWAP)` directly into the
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// primary ring at WPTR, then let the natural drain consume them.
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//
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// That works in **pure lockstep** (drain runs at every kernel callback
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// boundary, ring has at most a few hundred packets pending). It
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// **does not** work under `--parallel` (CPU + GPU ring contention) —
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// observed empirically: vd_swap's `drain_to_current_wptr` consumes
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// 8-10 million game-batched IB packets in the 900 ms inline-deadline
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// window without reaching our tail-injected PM4_XE_SWAP. Under
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// threaded backend the worker has the same deadline. Either:
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// (a) the safety-net direct notify (below) fires and gets the swap
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// counted — but if the worker *eventually* drains past our
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// injected packet later it would double-count,
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// (b) we extend the deadline so far that vd_swap blocks for many
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// seconds — unreasonable for a kernel callback.
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//
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// Skip the ring injection unconditionally and post `notify_xe_swap`
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// directly. The drain still runs (game packets execute as normal).
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// **Trade-off**: the slot-0 fetch-constant patch is deferred —
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// tracked as GPUBUG-FETCH-PATCH-001. Sylpheed currently has draws=0,
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// so a stale slot 0 has no observable effect.
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let drained = state.gpu.drain_to_current_wptr(mem);
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tracing::debug!(drained, "VdSwap: drained PM4 packets");
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// Safety net: if the drain didn't consume PM4_XE_SWAP for any reason
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// (ring address arithmetic edge case, threaded-backend timing), fall
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// back to the direct notify so swaps don't go to zero. Idempotent —
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// only fires when the PM4 path didn't bump the counter.
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let post_swap_counter = state.gpu.digest_snapshot().stats.swaps_seen;
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if post_swap_counter == pre_swap_counter
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&& frontbuffer_addr != 0
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&& width > 0
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&& height > 0
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{
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tracing::warn!(
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"VdSwap: PM4_XE_SWAP not consumed by drain (drained={drained}); falling back to direct notify"
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);
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// Direct swap notification. Inline mode bumps `swaps_seen`
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// synchronously; threaded mode posts a `GpuCommand::NotifyXeSwap`
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// and the worker bumps it asynchronously.
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if frontbuffer_addr != 0 && width > 0 && height > 0 {
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state.gpu.notify_xe_swap(frontbuffer_addr, width, height);
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}
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@@ -2660,7 +2612,6 @@ fn vd_swap(ctx: &mut PpcContext, mem: &GuestMemory, state: &mut KernelState) {
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fmt = texture_format,
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cs = color_space,
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drained,
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injected_dwords,
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buffer_ptr = format_args!("{buffer_ptr:#010x}"),
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fetch_ptr = format_args!("{fetch_ptr:#010x}"),
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"VdSwap complete"
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